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[MLSys'24] Atom: Low-bit Quantization for Efficient and Accurate LLM Serving
Code for Neurips24 paper: QuaRot, an end-to-end 4-bit inference of large language models.
[TMLR 2024] Efficient Large Language Models: A Survey
Artifact for "Multi-Dimensional Vector ISA Extension for Mobile In-Cache Computing (HPCA 2025)" paper
A PIM instrumentation, compilation, execution, simulation, and evaluation repository for BLIMP-style architectures.
Message passing ISA compiler for general GNN, and architecture simulation for graph tensor accelerator
Run Mixtral-8x7B models in Colab or consumer desktops
UPMEM LLM Framework allows profiling PyTorch layers and functions and simulate those layers/functions with a given hardware profile.
JackonYang / hands-on-tvm
Forked from mlc-ai/notebookshands on model tuning with TVM and profile it on a Mac M1, x86 CPU, and GTX-1080 GPU.
DAMOV is a benchmark suite and a methodical framework targeting the study of data movement bottlenecks in modern applications. It is intended to study new architectures, such as near-data processin…
translate python documents to Chinese for convenient reference 简而言之，这里用来存放那些Python文档君们，并且尽力将其翻译成中文~~
Tips for Writing a Research Paper using LaTeX
NeuPIMs: NPU-PIM Heterogeneous Acceleration for Batched LLM Inferencing
MambaOut: Do We Really Need Mamba for Vision? (CVPR 2025)
Ramulator 2.0 is a modern, modular, extensible, and fast cycle-accurate DRAM simulator. It provides support for agile implementation and evaluation of new memory system designs (e.g., new DRAM stan…
A Fast and Extensible DRAM Simulator, with built-in support for modeling many different DRAM technologies including DDRx, LPDDRx, GDDRx, WIOx, HBMx, and various academic proposals. Described in the…
Training and serving large-scale neural networks with auto parallelization.
DRAMsim3: a Cycle-accurate, Thermal-Capable DRAM Simulator
Open-source Framework for HPCA2024 paper: Gemini: Mapping and Architecture Co-exploration for Large-scale DNN Chiplet Accelerators