FuseSoC is an award-winning package manager and a set of build tools for HDL (Hardware Description Language) code.
Its main purpose is to increase reuse of IP (Intellectual Property) cores and be an aid for creating, building and simulating SoC solutions.
FuseSoC makes it easier to
- reuse existing cores
- create compile-time or run-time configurations
- run regression tests against multiple simulators
- Port designs to new targets
- let other projects use your code
- set up continuous integration
FuseSoC is non-intrusive Most existing designs doesn't need any changes to work with FuseSoC. Any FuseSoC-specific patches can be applied on the fly during implementation or simulation
FuseSoC is modular It can be used as an end-to-end flow, to create initial project files for an EDA tool or integrate with your custom workflow
FuseSoC is extendable Latest release support simulating with GHDL, Icarus Verilog, Isim, ModelSim, Verilator and Xsim. It also supports building FPGA images with Altera Quartus, project IceStorm, Xilinx ISE and Xilinx Vivado. Support for a new EDA tool requires ~100 new lines of code and new tools are added continuously
FuseSoC is standard-compliant Much effort has gone into leveraging existing standards such as IP-XACT and vendor-specific core formats where applicable.
FuseSoC is resourceful The standard core library currently consisting of over 100 cores including CPUs, peripheral controllers, interconnects, complete SoCs and utility libraries. Other core libraries exist as well and can be added to complement the standard library
FuseSoC is free software It puts however no restrictions on the cores and can be used to manage your company's internal proprietary core collections as well as public open source projects
FuseSoC is battle-proven It has been used to successfully build or simulate projects such as Nyuzi, Pulpino, VScale, various OpenRISC SoCs, picorv32, osvvm and more.
Read more in the online documentation, or get straight into business with the quick start below
Install latest stable version:
sudo pip install fusesoc
Install latest development version from git:
git clone https://github.com/olofk/fusesoc cd fusesoc sudo pip install -e .
FuseSoC should now be installed. Next step is to download the FuseSoC standard IP core library. This is optional but provides a lot of handy cores to be used in your projects. To install it globally for all workspaces
fusesoc library add --global fusesoc-cores https://github.com/fusesoc/fusesoc-cores
or to the current workspace
fusesoc library add fusesoc-cores https://github.com/fusesoc/fusesoc-cores
Test your installation by running fusesoc core list. This should return the list of cores that FuseSoC has found.
If you have any of the supported simulators installed, you can try to run a simulation on one of the cores as well.
For example, fusesoc run --target=sim simple_spi will run a regression test on the core simple_spi using icarus verilog.
If you also have Project IceStorm installed, you can try to build an FPGA image for a supported system. The following command will build the servant SoC (a SoC built around SERV, the world's smallest RISC-V CPU) for the TinyFPGA BX board, fusesoc run --target=tinyfpga_bx servant.
fusesoc --help will give you more information on commands and switches.
Did it work? Great! Check out the online documentation to learn more about creating your own core files and using existing ones. If it didn't work, please file a bug report
The current documentation can be viewed online.
An effort to update the documentation is in progress. To check this new
documentation, run cd doc && make html from the repo root.
A few tutorials using FuseSoC are available, but they are unfortunately all written before FuseSoC was renamed from orpsocv3:
http://www.rs-online.com/designspark/electronics/eng/blog/booting-linux-on-a-de0-nano-with-orpsoc
There is also some FuseSoC-related articles and extended release information on my blog