[Cider 2.0] Basic Simulation flow #1912
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rachitnigam
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Feb 16, 2024
* clippy lint * debug printing * misc nonsense * checkpoint * add run program * rename the stdmem impls * move the get_next for control points into two separate non-internal functions * some light documentation and renaming * add an assert * add some dinky placeholder printing for internal state * fix some issues with the memories and move serialization * set the go ports appropriately * clean up warnings
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This adds enough of the infrastructure to allow some programs to simulate on the flattened version of Cider. This is missing a bunch of things, including a proper way of presenting output but is a good starting point. I also moved a few things around to make life easier in the future, mainly making the serialization logic used for memories exist largely in its own module.