Stars
experiments relating to the encapsulation of data within other data
JumpServer is an open-source Privileged Access Management (PAM) tool that provides DevOps and IT teams with on-demand and secure access to SSH, RDP, Kubernetes, Database and RemoteApp endpoints thr…
HSLynk 是一个使用 Flutter 和 Fluent UI 构建的现代化 HS-LINK PRO 上位机。
A FPGA friendly 32 bit RISC-V CPU implementation
MCP Server to expose the GDB debugging capabilities
Verilog Ethernet components for FPGA implementation
elvisfox / nanorv32
Forked from YosysHQ/picorv32NanoRV32 -- A small RV32I[MC] core capable of running RTOS
A very simple and easy to understand RISC-V core.
Verible is a suite of SystemVerilog developer tools, including a parser, style-linter, formatter and language server
CDBUS (Controller Distributed Bus) Protocol and IP Core
elaphureLink is a CMSIS-DAP compliant debugger solution for Arm® Keil® µVision® IDE that provides conversion between TCP/IP and DAP.
Lightweight elf binary parser with no external dependencies - Sections, Symbols, Relocations, Segments
An FPGA-based USB 1.1 (full-speed) device core to implement USB-serial, USB-camera, USB-audio, USB-hid, etc. It requires only 3 FPGA common IOs rather than additional chips. 基于FPGA的USB 1.1 (full-sp…
Debug and parallel trace hardware for CORTEX-M (FPGA + support code)
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Firmware for Stereo Triggered Sampler, a eurorack module from 4ms Company
Four-channel CANFD analyzer based on hpmicro hpm5361
RCSN / hpm_sdk_extra
Forked from hpmicro/hpm_sdk_extraExtra demos from community
Tuya open source AI+IoT development framework for device for T2, T3, T5AI, esp32, esp32c3, ln882h, bk7231n