Starred repositories
A Python package to use FPGA development tools programmatically.
The original ELIZA on an emulated CTSS environment
A collection of reusable, high-quality, peer-reviewed VHDL building blocks.
Library of open source Process Design Kits (PDKs)
An open-source HDL register code generator fast enough to run in real time.
GitHub Action for generating Doxygen documentation for your projects.
A high-throughput VHDL and SystemVerilog implementation of AES-128 including scripts for a full front-end design process.
🧪 single header unit testing framework for C and C++
The smallest public printf implementation for its feature set.
GNU toolchain for RISC-V, including GCC
8000 This driver board controls e-paper displays from Waveshare. Thus it is easy to display visually beautiful dashboards.
The next generation of OpenLane, rewritten from scratch with a modular architecture
Python SDK, Proxy Server (LLM Gateway) to call 100+ LLM APIs in OpenAI format - [Bedrock, Azure, OpenAI, VertexAI, Cohere, Anthropic, Sagemaker, HuggingFace, Replicate, Groq]
OpenROAD's unified application implementing an RTL-to-GDS Flow. Documentation at https://openroad.readthedocs.io/en/latest/
I present a novel pipelined fast Fourier transform (FFT) architecture which is capable of producing the output sequence in normal order. A single-path delay commutator processing element (SDC PE) h…
GPT4All: Run Local LLMs on Any Device. Open-source and available for commercial use.
C API and CLI Tool for Robot Electronics USB-I2C Bridge (USB-ISS)
Fraunhofer IMS processor core. RISC-V ISA (RV32IM) with additional peripherals for embedded AI applications and smart sensors.