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0.12

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attempt to work around conda problems

0.11

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sayma: add USER_CLOCK_ROOT on SDRAM clock buffers

0.10

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sdram_phy/kusddrphy: add odelaye3 on all outputs (to have identical d…

…elays on all outputs before software dq/dqs delay configuration)

0.9

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spi: fix clock divider selection

* make the clock divider an up counter
* use the correct targer divider to compare with

spi: fix clock divider bias
introduced in ed1bc46
spi: extend reading flag duration
spi: use read divider when not writing
spi: fix first chained read clock cycle

close m-labs#76

0.8

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a7_1000basex: disable integrated comma circuit

0.8.dev

0.7

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liteeth: just check for SFD and ignore preamble corruption

IEEE 802.3-2008 clause 35 allows all seven preamble bytes to
be lost or corrupted. The only reliable byte to start a frame
is the SFD.

closes m-labs#64

0.7.dev

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liteeth_mini: export ethmac slot parameters via CSR constants.

0.6

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conda: sanitize version

0.6.dev

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jordens Robert Jördens
GPG key ID: C38D0AAF11329EB8
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