Nho/versal/msi #30
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Nho/versal/msi #30
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Create the ITS device as part of versal soc and map it into the versal APU memory region. Signed-off-by: Nelson Ho <Nelson.Ho@windriver.com>
kay-ge
approved these changes
Mar 6, 2025
hw/arm/xlnx-versal-virt.c
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| const char compat[] = "arm,gic-v3-its"; | ||
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| nodename = g_strdup_printf("%s/gic-its@%x", gicname, MM_GIC_APU_ITS); | ||
| qemu_fdt_add_subnode(s->fdt, nodename);\ |
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TFTR! I address both points
Create GIC ITS device tree subnode when creating GIC node. Add msi-map property to pcie controller node. Signed-off-by: Nelson Ho <Nelson.Ho@windriver.com>
size-cells property is not inherited from ancestors in the device tree, so must be explicitly defined in the GIC node. Devices that specify the GIC as the interrupt parent format the size field in their reg property according to the value of the GIC size-cells property. Without the size-cells property in the GIC node, the reg property of the pcie controller and other devices using the GIC as the interrupt parent may be parsed incorrectly, resulting in mmio regions being mapped incorrectly. Signed-off-by: Nelson Ho <Nelson.Ho@windriver.com>
Enable Locality-specific Peripheral Interrupts. Connect the GICv3 to fpd.apu.mr as dma_as for MSI support. The ITS translation tables are stored in memory and the ITS will manage these tables as part of its operation. Signed-off-by: Nelson Ho <Nelson.Ho@windriver.com>
VxWorks does only one pass over the device tree and treats the GIC the same as any other peripheral in terms of initialization priority. As a result, any devices that use dynamic interrupts that specify the GIC as the interrupt parent need to be parsed and initialized after the GIC. To accomodate the VxWorks behavior, place the GIC node in the device tree such that it precedes any other peripherals. Note: Devices that use static interrupts (PPI/SPI) do not have the same requirement, as VxWorks has a mechanism to defer connection of statically assigned interrupts to the interrupt initialization finalize routine. See vxbIntDeferFinalize() Signed-off-by: Nelson Ho <Nelson.Ho@windriver.com>
kay-ge
approved these changes
Mar 6, 2025
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Add MSI/MSIX interrupts to versal machine.