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Tags: Tachi107/dynarmic

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r5

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thumb32: Implement MRS (register)

r4

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Release 4

Since r3, we've added:

* More complete (64-bit) A64 support
* The unsafe_optimizations option
* Minor bugfixes and optimizations

r3

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translate_arm: ConditionPassed: Some instructions emit no microinstru…

…ctions

r2

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A64: Add options for detecting misaligned loads and stores

r1

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emit_x64: InvalidateCacheRanges: erase blocks after iterating through…

… the map (#124)
0