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Starred repositories
SystemVerilog 2017 Pre-processor, Parser, Elaborator, UHDM Compiler. Provides IEEE Design/TB C/C++ VPI and Python AST & UHDM APIs. Compiles on Linux gcc, Windows msys2-gcc & msvc, OsX
Verible is a suite of SystemVerilog developer tools, including a parser, style-linter, formatter and language server
Random instruction generator for RISC-V processor verification
Chisel: A Modern Hardware Design Language
A primer for users trying to make sense of Org Mode
Sourcetrail - free and open-source interactive source explorer
vertical widgets for oled and niceview screens using zmk (for split and non-split keyboards)
A hackable markdown, Typst, latex, html(inline) & YAML previewer for Neovim
A highly experimental vi-inspired editor where you edit code, not text.
Tools for data mining of brain graphs. Related publication: http://dx.doi.org/10.1007/s11571-017-9445-1
Exercises for the Terminal tutorials on Simple Dev. Check the README below for instructions on how to download them.
For teache 8000 rs: Explain the terminal (cmd or command line) to your students with this super fun game.
A guitar effects processor based on the Raspberry Pi Pico
CORE-V Wally is a configurable RISC-V Processor associated with RISC-V System-on-Chip Design textbook. Contains a 5-stage pipeline, support for A, B, C, D, F, M and Q extensions, and optional cache…
Continuous Unix commit history from 1970 until today
☸️ A community repository for Helm Charts of OpenSearch Project.
🧰 OpenSearch / OpenSearch-Dashboards Build Systems
Learn WebAssembly by writing small programs!
GNU toolchain for RISC-V, including GCC
@material-tailwind is an easy-to-use components library for Tailwind CSS and Material Design.