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R2MDC FFT/IFFT processor adaptive to 64/128/256/512 point
An open-source static random access memory (SRAM) compiler.
Hardware and software implementation of Sparsely-active SNNs
Update arXiv papers about Spiking Neural Networks daily.
A WebUI app for Music-Source-Separation-Training and we packed UVR together!
RIDECORE (RIsc-v Dynamic Execution CORE) is an Out-of-Order RISC-V processor written in Verilog HDL.
AISystem 主要是指AI系统，包括AI芯片、AI编译器、AI推理和训练框架等AI全栈底层技术
😎 Awesome lists about all kinds of interesting topics
A list of papers, docs, codes about model quantization. This repo is aimed to provide the info for model quantization research, we are continuously improving the project. Welcome to PR the works (p…
Must-have verilog systemverilog modules
Learn about the Neumorphic engineering process of creating large-scale integration (VLSI) systems containing electronic analog circuits to mimic neuro-biological architectures.
tinyODIN digital spiking neural network (SNN) processor - HDL source code and documentation.
List of open source neuromorphic projects: SNN training frameworks, DVS handling routines and so on.
Repository collecting papers about neuromorphic hardware, such as ASIC and FPGA implementations of SNNs and stuff.
Free monospaced font with programming ligatures
SHA series hash algorithm hardware Coprocessor based on RISC-V 基于RISC-V的SHA系列算法硬件加速协处理器设计及实现
An open source software stack for Real-Time Strategy research on mobile robots
🚨 GROW YOUR AUDIENCE WITH HUGOBLOX! 🚀 HugoBlox is an easy, fast no-code website builder for researchers, entrepreneurs, data scientists, and developers. Build stunning sites in minutes. 适合研究人员、企业家、…
Official electron build of draw.io
A tool to decode RISC-V and LoongArch and MIPS instructions in gtkwave