-
ShanDong University
- No. 1500, Shunhua Road, Jinan Hi-Tech Zone, Shandong University Software Park Campus
-
22:00
(UTC +08:00)
Highlights
- Pro
Lists (8)
Sort Name ascending (A-Z)
Stars
Conquer Any Code in VSCode: One-Click Comments, Conversions, UI-to-Code, and AI Batch Processing of Files! 在 VSCode 中征服任何代码:一键注释、转换、UI 图生成代码、AI 批量处理文件!💪
H265 decoder write in verilog, verified on Xilinx ZYNQ7035
xk265:HEVC/H.265 Video Encoder IP Core (RTL)
A lightweight image converter which supports PNG, PNM, BMP, QOI, JPEG-LS, and H.265 intra-frame.
HElib is an open-source software library that implements homomorphic encryption. It supports the BGV scheme with bootstrapping and the Approximate Number CKKS scheme. HElib also includes optimizati…
Microsoft SEAL is an easy-to-use and powerful homomorphic encryption library.
This is the development repository for the OpenFHE library. The current stable version is 1.2.4 (released on March 21, 2025). The current development version is 1.3.0 (released on May 21, 2025).
CoPHEE is a Co-processor for Partially Homomorphic Encrypted Encryption.
Homomorphic Encryption Accelerator Project for the Stanford EE372 tapeout class. We implement the BGV encryption scheme with Skywater-PDK (130nm).
risc-v isa extension and rlwe acceleration
Accelerating the AES algorithm on an FPGA and comparing the speedup with both AES and Modified AES algorithms
FPGA implementation of Chinese SM4 encryption algorithm.
Undergraduate digital circuit laboratory
All in one vscode plugin for HDL development
This repository contains code and pdf tutorial of how I've implemented binocular camera matching algorithm, SGBM, with FPGA using verilog. Code in this repo contains both C++ SGBM simulation code a…
implementation of opencv sgbm(disparity map extract) on FPGA
Free monospaced font with programming ligatures
33F5 Implementing 32 Verilog Mini Projects. 32 bit adder, Array Multiplier, Barrel Shifter, Binary Divider 16 by 8, Booth Multiplication, CRC Coding, Carry Select and Carry Look Ahead Adder, Carry Skip …