Node-Wise Hardware Trojan Detection Based on Graph Learning
In the fourth industrial revolution, securing the protection of supply chains has become an ever-growing concern. One such cyber threat is a hardware Trojan (HT), a malicious modification to an IC. HTs are often identified during the hardware ...
Hardware Design of an Advanced-Feature Cryptographic Tile Within the European Processor Initiative
This work describes the hardware implementation of a cryptographic accelerators suite, named Crypto-Tile, in the framework of the European Processor Initiative (EPI) project. The EPI project traced the roadmap to develop the first family of low-power ...
Reducing Paging and Exit Overheads in Intel SGX for Oblivious Conjunctive Keyword Search
Paging and exit overheads have been proven to be the performance bottlenecks when adopting Searchable Symmetric Encryption (SSE) with trusted hardware such as Intel SGX for keyword search. This problem becomes more serious when incorporating ORAM and SGX ...
Multivariate TVLA—Efficient Side-Channel Evaluation Using Confidence Intervals
Securing cryptographic hardware designs and software implementations against side-channel attacks that leverage the power consumption or electromagnetic emanations of a device is an active topic of research. Different countermeasures against these attacks ...
WhistleBlower: A System-Level Empirical Study on RowHammer
- Wei He,
- Zhi Zhang,
- Yueqiang Cheng,
- Wenhao Wang,
- Wei Song,
- Yansong Gao,
- Qifei Zhang,
- Kang Li,
- Dongxi Liu,
- Surya Nepal
With frequent software-induced activations on DRAM rows, bit flips can occur on their physically adjacent rows (i.e., RowHammer). Existing studies leverage FPGA platforms to characterize RowHammer, which have identified key factors that contribute to ...
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Besides enormous research efforts in the design of Physically Unclonable Functions (PUFs), its vulnerabilities are still being exploited using machine learning (ML) based model-building attacks. Due to inherent complicacy in exploring and manually ...
How to Launch a Powerful Side-Channel Collision Attack?
A cryptographic implementation produces very similar power leakages when fed with the same input. Side-channel collision attacks exploit these similarities to establish the relationship between sub-keys and improve the efficiency of key recovery. ...
Secure Remote Attestation With Strong Key Insulation Guarantees
Secure processors with hardware-enforced isolation are crucial for secure cloud computation. However, commercial secure processors have underestimated the capabilities of attackers and failed to provide secure execution environments capable of protecting ...
AI Trojan Attack for Evading Machine Learning-Based Detection of Hardware Trojans
The globalized semiconductor supply chain significantly increases the risk of exposing System-on-Chip (SoC) designs to hardware Trojans. While machine learning (ML) based Trojan detection approaches are promising due to their scalability as well as ...
Being Patient and Persistent: Optimizing An Early Stopping Strategy for Deep Learning in Profiled Attacks
The absence of an algorithm that effectively monitors the deep learning models used in side-channel attacks increases the difficulty of a security evaluation. If an attack is unsuccessful, that could be due to multiple reasons. It can be that we are ...
Pako: Multi-Valued Byzantine Agreement Comparable to Partially-Synchronous BFT
Asynchronous <italic>Byzantine Fault Tolerance</italic> (BFT) consensus protocols are gaining attention for their resilience against network attacks. Among them, <italic>Multi-valued Byzantine Agreement</italic> (MVBA) protocols play a critical role, ...
Data Sharing in the Metaverse With Key Abuse Resistance Based on Decentralized CP-ABE
Data sharing is ubiquitous in the metaverse, which adopts blockchain as its foundation. Blockchain is employed because it enables data transparency, achieves tamper resistance, and supports smart contracts. However, securely sharing data based on ...
Nicaea: A Byzantine Fault Tolerant Consensus Under Unpredictable Message Delivery Failures for Parallel and Distributed Computing
- Guanlin Jing,
- Yifei Zou,
- Minghui Xu,
- Yanqiang Zhang,
- Dongxiao Yu,
- Zhiguang Shan,
- Xiuzhen Cheng,
- Rajiv Ranjan
Byzantine fault-tolerant (BFT) consensus is a critical problem in parallel and distributed computing systems, particularly with potential adversaries. Most prior work on BFT consensus assumes reliable message delivery and tolerates arbitrary failures of ...
NStore: A High-Performance NUMA-Aware Key-Value Store for Hybrid Memory
- Zhonghua Wang,
- Kai Lu,
- Jiguang Wan,
- Hong Jiang,
- Zeyang Zhao,
- Peng Xu,
- Biliang Lai,
- Guokuan Li,
- Changsheng Xie
Emerging persistent memory (PM) promises near-DRAM performance, larger capacity, and data persistence, attracting researchers to design PM-based key-value stores. However, existing PM-based key-value stores lack awareness of the Non-Uniform Memory Access (...
Protecting the CCSDS 123.0-B-2 Compression Algorithm Against Single-Event Upsets for Space Applications
- Daniel Báscones,
- Francisco García-Herrero,
- Óscar Ruano,
- Carlos González,
- Daniel Mozos,
- Juan Antonio Maestro
Hyperspectral imaging is an excellent tool to remotely analyze the Earth from in-orbit devices. Satellites capture these images containing vast information about the ground pixels. To optimize storage and transmission speeds, compression is often ...
RuYi: Optimizing Burst Buffer Through Automated, Fine-Grained Process-to-BB Mapping
Current supercomputers use an SSD-based storage layer called Burst Buffer (BB) to provide I/O-intensive applications with accelerated storage access. However, efficiently utilizing this limited and expensive storage remains a critical issue, creating an ...
Humas: A Heterogeneity- and Upgrade-Aware Microservice Auto-Scaling Framework in Large-Scale Data Centers
An effective auto-scaling framework is essential for microservices to ensure performance stability and resource efficiency under dynamic workloads. As revealed by many prior studies, the key to efficient auto-scaling lies in accurately learning ...
High-Radix Generalized Hyperbolic CORDIC and Its Hardware Implementation
In this paper, we propose a high-radix generalized hyperbolic coordinate rotation digital computer (HGH-CORDIC). This algorithm not only computes logarithmic and exponential functions with any fixed base but also significantly reduces the number of ...
A Parallel Computing Scheme Utilizing Memristor Crossbars for Fast Corner Detection and Rotation Invariance in the ORB Algorithm
The Oriented FAST and Rotated BRIEF (ORB) algorithm plays a crucial role in rapidly extracting image keypoints. However, in the domain of high-frame-rate real-time applications, the algorithm faces challenges of the speed and computational efficiency with ...
Accurate and Reliable Energy Measurement and Modelling of Data Transfer Between CPU and GPU in Parallel Applications on Heterogeneous Hybrid Platforms
Developing energy-efficient software that leverages application-level energy optimization techniques is essential to tackle the pressing technological challenge of energy efficiency on modern heterogeneous computing platforms. While energy modelling and ...
NPC: A <bold>N</bold>on-Conflicting <bold>P</bold>rocessing-in-Memory <bold>C</bold>ontroller in DDR Memory Systems
Processing-in-Memory (PIM) has emerged as a promising solution to address the memory wall problem. Existing memory interfaces must support new PIM commands to utilize PIM, making the definition of PIM commands according to memory modes a major issue in ...
Lock-Free Triangle Counting on GPU
Finding the triangles of large scale graphs is a fundamental graph mining task in many applications, such as motif detection, microscopic evolution, and link prediction. The recent works on triangle counting can be classified into merge-based or binary ...
Feynman Meets Turing: The Uncomputability of Quantum Gate-Circuit Emulation and Concatenation
We investigate the feasibility of computing quantum gate-circuit emulation (QGCE) and quantum gate-circuit concatenation (QGCC) on digital hardware. QGCE serves the purpose of rewriting gate circuits comprised of gates from a varying input gate set to ...
Access-Pattern Hiding Search Over Encrypted Databases by Using Distributed Point Functions
Encrypted databases have been extensively studied with the increasing concern of data privacy in cloud services. For practical efficiency, most encrypted database systems are built under Dynamic Searchable Symmetric Encryption (DSSE) schemes to support ...
ReViT: Vision Transformer Accelerator With Reconfigurable Semantic-Aware Differential Attention
While vision transformers (ViTs) have continued to achieve new milestones in computer vision, their complicated network architectures with high computation and memory costs have hindered their deployment on resource-limited edge devices. Some customized ...
WaWoT: Towards Flexible and Efficient Web of Things Services via WebAssembly on Resource-Constrained IoT Devices
Web of Things (WoT) is an emerging concept to connect IoT devices to the web using standard interfaces. This provides interoperability between different IoT platforms and enables seamless integration with web and cloud services. However, running ...