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Volume 30, Issue 5September 2010
Reflects downloads up to 17 Jan 2025Bibliometrics
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Multicore: The View from Europe

In 2004, the European Commission funded the HiPEAC Network of Excellence to improve research in the fields of computer architecture and compilation in Europe. In response to the paradigm shift to multicore-based computers, the European Commission has ...

research-article
ArchExplorer for Automatic Design Space Exploration

Growing architectural complexity and stringent time-to-market constraints suggest the need to move architecture design beyond parametric exploration to structural exploration. ArchExplorer is a Web-based permanent and open design-space exploration ...

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The SARC Architecture

The SARC architecture is composed of multiple processor types and a set of user-managed direct memory access (DMA) engines that let the runtime scheduler overlap data transfer and computation. The runtime system automatically allocates tasks on the ...

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Explicit Communication and Synchronization in SARC

A new network interface optimized for SARC supports synchronization and explicit communication and provides a robust mechanism for event responses. Full-system simulation of the authors' design achieved a 10- to 40-percent speed increase over ...

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Parallel Programming Models for Heterogeneous Multicore Architectures

This article evaluates the scalability and productivity of six parallel programming models for heterogeneous architectures, and finds that task-based models using code and data annotations require the minimum programming effort while sustaining nearly ...

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SARC Coherence: Scaling Directory Cache Coherence in Performance and Power

The SARC project seeks to improve power scalability of shared-memory chip multiprocessors (CMPs) by making directory coherence more efficient in both power and performance. The authors describe how they eliminate two major sources of inefficiency for ...

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Merasa: Multicore Execution of Hard Real-Time Applications Supporting Analyzability

The Merasa project aims to achieve a breakthrough in hardware design, hard real-time support in system software, and worst-case execution time analysis tools for embedded multicore processors. The project focuses on developing multicore processor ...

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The Velox Transactional Memory Stack

The adoption of multi- and many-core architectures for mainstream computing undoubtedly brings profound changes in the way software is developed. In particular, the use of fine grained locking as the multi-core programmer’s coordination methodology is ...

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HArtes: Hardware-Software Codesign for Heterogeneous Multicore Platforms

Developing heterogeneous multicore platforms requires choosing the best hardware configuration for mapping the application, and modifying that application so that different parts execute on the most appropriate hardware component. The hArtes toolchain ...

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Gatekeeping Economics

It has become fashionable among Internet and Web watchers to notice threats on the horizon to the open Web. For example, in garish colors, Wired magazine's September 2010 issue declared the open-access Web dead. Jonathan Zittrain's 2008 book, The Future ...

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