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Modern High Level Synthesis (HLS) tools succeed well in their engineering productivity goal, but still require toolset and target technology specific modifications to the source code to guide the process towards an efficient implementation. ...

In computer-vision feature extraction algorithms, compressing the image into a sparse set of trackable keypoints, empowers navigation-critical systems such as Simultaneous Localization And Mapping (SLAM) in autonomous robots, and also other ...

On the one hand, processors for hearing aids are highly specialized for audio processing, on the other hand they have to meet challenging hardware restrictions. This paper aims to provide an overview of the requirements, architectures, and ...

In recent years, application specific instruction set processor (ASIP) has attracted many researchers attention. These processors resemble application specific integrated circuits (ASICs) and digital signal processors (DSPs) from the performance and ...

In this work, we propose a parallel programming framework, SIMDify, which generates single-instruction-multiple-data (SIMD) processors that can achieve SIMD processing without using SIMD instructions. SIMDify takes an application machine code compiled ...

Many applications make extensive use of various forms of compression techniques for storing and communicating data. As decompression is highly regular and repetitive, it is a suitable candidate for acceleration. Examples are offloading (de)compression ...

Application specific instruction-set processors (ASIP) is a customised processor for user specific application. Though a significant research has been done on this, still it is most promising technology, due to lack of efficient methodologies for ...

Nowadays ongoing integration of camera based advanced driver assistance systems (ADAS) in vehicles demands increasingly complex digital image processing in order to interpret the surrounding situations. To ensure a timely reaction for ...

Application specific instruction-set processors (ASIP) are a programmable and flexible alternative of traditional finite state machine (FSM) controlled register-transfer level (RTL) designs for multimode basedband systems. In this paper, we present two ...

We propose automatic synthesis of application specific instruction set processors (ASIPs). We use pipeline execution of multi-op machine-instructions, e.g., $$*({ reg}1*{ reg}2) = (*{ reg}3)+(*{ reg}4)$$ź(reg1źreg2)=(źreg3)+(źreg4) (C-syntax) an ...

Specialized Digital Signal Processors (DSPs), which can be found in a wide range of modern devices, play an important role in power-efficient, high-performance image processing. Applications including camera sensor post-processing and computer vision ...

One of the key problems in the field of Computer Vision is recovering the geometry from multiple views of the same scene. Once the homography of two images is known, the motion of a stereo camera system can be determined, images can be rectified or ...

Lattice Reduction aided MIMO detectors have been demonstrated to offer a promising gain by providing near-optimal performance. This paper presents a C-programmable ASIP baseband processor, for near-optimal MIMO detection targeting a 4 4 LTE system. The ...

There is a disconnection between the theory and the practice of lightweight physical unclonable function (PUF)‐based protocols. At a theoretical level, there exist several PUF‐based authentication protocols with unique features and novel efficiency ...

In this paper we target the design of a dedicated low-power computing platform for neuroprosthetic applications. The system must be capable of decoding the information encoded in neural signals, to extract the patients' motion intention. To this aim, a ...

One key issue in the design of Real-Time Image Processing and Computer Vision IP/CV systems is the massive volume of data to process. Not only the number of arithmetic and logic operations over the data but also the access to these data represents an ...

In this work we present a methodology to design the next generation of real-time vision processors. These processors are expected to achieve high throughput with complex applications, under real-time embedded constraints time, fault-tolerance, silicon ...

In this article, a heuristic custom instruction (CI) selection algorithm is presented. The proposed algorithm, which is called OPLE for “Optimization based on Partitioning and Local Exploration,” uses a combination of greedy and optimal optimization ...

Imagers with programmable, highly parallel signal processing execute computationally intensive processing steps directly on the sensor, thereby allowing early reduction of the amount of data to relevant features. For the purposes of architectural ...

SHA-1 remains, till date, the most widely used hash function, in spite of several successful cryptanalytic attacks against it. These attacks, however, remain impractical due to high computation complexity and associated cost. We endeavor to do cost-time ...