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SCOPES '18: Proceedings of the 21st International Workshop on Software and Compilers for Embedded Systems
ACM2018 Proceeding
Publisher:
  • Association for Computing Machinery
  • New York
  • NY
  • United States
Conference:
SCOPES '18: 21st International Workshop on Software and Compilers for Embedded Systems Sankt Goar Germany May 28 - 30, 2018
ISBN:
978-1-4503-5780-7
Published:
28 May 2018
In-Cooperation:
EDAA, SIGBED

Skip Abstract Section
Abstract

Welcome to Sankt Goar and the SCOPES workshop. This year we are presenting a workshop program that features many interesting talks on all aspects related to the design of modern embedded systems. I hope that you will find our program interesting, stimulating and exciting.

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SESSION: Full Papers
research-article
Exploiting Specification Modularity to Prune the Optimization-Space of Manufacturing Systems

In this paper we address the makespan optimization of industrial-sized manufacturing systems. We introduce a framework which specifies functional system requirements in a compositional way and automatically computes makespan optimal solutions respecting ...

SESSION: Research Presentations
short-paper
Optimizing Worst-Case Execution Times Using Mainstream Compilers

Compiler optimizations are widely used to enhance the average case performance of software, and these techniques are very effective and advance with every compiler version. However, in realtime systems, it is the worst-case performance that matters. ...

short-paper
Towards a verified Lustre compiler with modular reset

This paper presents ongoing work to add a modular reset construct to a verified Lustre compiler. We present a novel formal specification for the construct and sketch our plans to integrate it into the compiler and its correctness proof.

SESSION: Full Papers
research-article
Reinforcement Learning for Power-Efficient Grant Prediction in LTE

Reducing the energy consumption of mobile phones is a major concern in the design of cellular modem solutions for LTE and 5G standards. Apart from optimizing hardware for power efficiency, dynamic power management, i.e., powering down idle system ...

SESSION: Research Presentations
short-paper
Restricted Scheduling Windows for Dynamic Fault-Tolerant Primary/Backup Approach-Based Scheduling on Embedded Systems

This paper is aimed at studying fault-tolerant design of the realtime multi-processor systems and is in particular concerned with the dynamic mapping and scheduling of tasks on embedded systems. The effort is concentrated on scheduling strategy having ...

short-paper
On the Cost of Freedom From Interference in Heterogeneous SoCs

In heterogeneous CPU+GPU SoCs where a single DRAM is shared between both devices, concurrent memory accesses from both devices can lead to slowdowns due to memory interference. This prevents the deployment of real-time tasks, which need to be guaranteed ...

SESSION: Full Papers
research-article
Less is More: Exploiting the Standard Compiler Optimization Levels for Better Performance and Energy Consumption

This paper presents the interesting observation that by performing fewer of the optimizations available in a standard compiler optimization level such as -02, while preserving their original ordering, significant savings can be achieved in both ...

SESSION: Research Presentations
short-paper
stdcbench: A Benchmark for Small Systems

Benchmark programs are useful for measuring performance. Benchmarks written in C effectively benchmark the performance of a C implementation consisting of hardware, compiler and standard library. For small systems (i.e. systems with just a few KB of ...

SESSION: Full Papers
research-article
Fast and Portable Vector DSP Simulation Through Automatic Vectorization

Vector DSPs are quite common in embedded SoCs used in compute-intensive domains such as imaging and wireless communication. To achieve short time-to-market, it is crucial to provide system architects and SW developers with fast and accurate instruction ...

SESSION: Research Presentations
short-paper
Multi-Criteria Compiler-Based Optimization of Hard Real-Time Systems

Real-Time Systems often come with additional requirements apart from being functionally correct and adhering to their timing constraints. Common additional optimization goals are meeting code size requirements or the reduction of energy consumption. We ...

short-paper
Mitigating Data Cache Aging through Compiler-Driven Memory Allocation

Many embedded systems have to operate flawlessly over several years. One of the key issues which may cause computational errors over time are memory errors inflicted by aging effects. We propose a compiler-based optimization in order to mitigate such ...

short-paper
Interrelations between Software Quality Metrics, Performance and Energy Consumption in Embedded Applications

Source code refactorings and transformations are extensively used by embedded system developers to improve the quality of applications, often supported by various open source and proprietary tools. They either aim at improving the design time quality ...

SESSION: Full Papers
research-article
Control Flow Vectorization for ARM NEON

Single Instruction Multiple Data (SIMD) extensions in processors enable in-core parallelism for operations on vectors of data. From the compiler perspective, SIMD instructions require automatic techniques to determine how and when it is possible to ...

research-article
Automatic Kernel Fusion for Image Processing DSLs

Programming image processing algorithms on hardware accelerators such as graphics processing units (GPUs) often exhibits a trade-off between software portability and performance portability. Domain-specific languages (DSLs) have proven to be a promising ...

SESSION: Research Presentations
short-paper
Measuring and Modeling Energy Consumption of Embedded Systems for Optimizing Compilers

Estimating energy consumption already during development as precisely as possible is crucial for many embedded system designs. These energy estimates should be expressed such that they can be used by subsequent automated optimizations during the ...

SESSION: Full Papers
research-article
Automatic Optimization of Redundant Message Routings in Automotive Networks

To cope with the strict reliability requirements of safety-critical ADAS applications, the upcoming TSN standard introduces mechanisms that enable transmission redundancy at any switch or end node. However, it is up to the designer to decide at which ...

SESSION: Research Presentations
short-paper
Toward Efficient Many-core Scheduling of Partial Expansion Graphs

Transformation of synchronous data flow graphs (SDF) into equivalent homogeneous SDF representations has been extensively applied as a pre-processing stage when mapping signal processing algorithms onto parallel platforms. While this transformation ...

short-paper
MASES: Mobility And Slack Enhanced Scheduling For Latency-Optimized Pipelined Dataflow Graphs

Dataflow and task graph descriptions are widely used for mapping and scheduling of real-time streaming applications onto heterogeneous processing platforms. Such applications are often characterized by the need to process large-volume data streams with ...

  1. Proceedings of the 21st International Workshop on Software and Compilers for Embedded Systems
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    Recommendations

    Acceptance Rates

    Overall Acceptance Rate 38 of 79 submissions, 48%
    YearSubmittedAcceptedRate
    SCOPES '2115747%
    SCOPES '2013862%
    SCOPES '179667%
    M-SCOPES '1316956%
    SCOPES '0926831%
    Overall793848%