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Block placement with symmetry constraints based on the O-tree non-slicing representation

Authors:

Yingxin Pang,

Florin Balasa,

Koen Lampaert,

Chung-Kuan ChengAuthors Info & Claims

DAC '00: Proceedings of the 37th Annual Design Automation Conference

Pages 464 - 467

https://doi.org/10.1145/337292.337545

Published: 01 June 2000 Publication History

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Abstract

The ordered tree (O-tree) representation has recently gained much interest in layout design automation. Different from previous topological representations of non-slicing floorplans, the O-tree representation is simpler, needs linear computation effort to generate a corresponding layout, and exhibits a smaller upper-bound of possible configurations. This paper addresses the problem of handling symmetry constraints in the context of the O-tree representation. This problem arises in analog placements, where symmetry is often used to match layout-induced parasitics and to balance thermal couplings in differential circuits. The good performance of our placement tool dealing with several analog designs taken from industry proves the effectiveness of our technique.

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Gao XZhang HLiu MShen LPan DLin YWang RHuang R(2023)Interactive Analog Layout Editing With Instant Placement and Routing LegalizationIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2022.319023442:3(698-711)Online publication date: Mar-2023
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Block placement with symmetry constraints based on the O-tree non-slicing representation

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Published In

DAC '00: Proceedings of the 37th Annual Design Automation Conference

June 2000

819 pages

ISBN:1581131879

DOI:10.1145/337292

Chairman:
Giovanni De Micheli
Stanford Univ., Stanford, CA

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

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Publication History

Published: 01 June 2000

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DAC00: ACM/IEEE-CAS/EDAC Design Automation Conference

June 5 - 9, 2000

California, Los Angeles, USA

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Overall Acceptance Rate 1,770 of 5,499 submissions, 32%

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Cited By

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Zhu KChen HLiu MPan D(2023)Hierarchical Analog and Mixed-Signal Circuit Placement Considering System Signal FlowIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2022.323036742:8(2689-2702)Online publication date: Aug-2023
https://doi.org/10.1109/TCAD.2022.3230367
Gao XZhang HLiu MShen LPan DLin YWang RHuang R(2023)Interactive Analog Layout Editing With Instant Placement and Routing LegalizationIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2022.319023442:3(698-711)Online publication date: Mar-2023
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https://doi.org/10.1007/978-3-031-13074-8_17
Budak APan DChen HZhu KLiu MAlawieh MZhang SShi WTang X(2022)CAD for Analog/Mixed‐Signal Integrated CircuitsAdvances in Semiconductor Technologies10.1002/9781119869610.ch3(43-60)Online publication date: 30-Sep-2022
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Zhu KChen HLiu MTang XSun NPan DXie Y(2020)Effective analog/mixed-signal circuit placement considering system signal flowProceedings of the 39th International Conference on Computer-Aided Design10.1145/3400302.3415625(1-9)Online publication date: 2-Nov-2020
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He LZhao ZChen YZhang L(2020)Placement with Sequence-Pair-Driven TCG for Advanced Analog Constraints2020 IEEE Canadian Conference on Electrical and Computer Engineering (CCECE)10.1109/CCECE47787.2020.9255695(1-4)Online publication date: 30-Aug-2020
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Wu IOu HChang Y(2016)QB-treesProceedings of the 53rd Annual Design Automation Conference10.1145/2897937.2898074(1-6)Online publication date: 5-Jun-2016
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