An efficient Sw/Hw architecture for cooperative transmission in wireless sensor networks

Since relaying algorithms are intensive computing tasks, the software/hardware (Sw/Hw) co-design reaches a good compromise between energy efficiency and performances (workload and real-time). This paper investigates the design of a Cooperative Transmission Technique (CTT) for low-power communication in Wireless Sensor Networks (WSNs) using two architectures. The first one is a pure software implementation based on an embedded soft-core processor. The validation of the proposed technique in real design is performed. Then, the identification of the most critical time and energy consuming tasks is performed using the profiling technique. An efficient Sw/Hw architecture (second) based on soft-core processor with accelerator modules is deduced. Indeed, hardware acceleration of the CTT is implemented on a System on Chip (SoC) to achieve low-power consumption level, reduced execution time as well as low-resource occupancy. Experimental results of the Sw/Hw implementation demonstrate significant improvements in terms of performance metrics compared with the Sw implementation.