[go: up one dir, main page]
More Web Proxy on the site http://driver.im/ skip to main content
article
Free access

Power characterisation for fine-grain reconfigurable fabrics

Published: 01 January 2010 Publication History

Abstract

This paper proposes a benchmarking methodology for characterising the power consumption of the fine-grain fabric in reconfigurable architectures. This methodology is part of the GroundHog 2009 power benchmarking suite. It covers active and inactive power as well as advanced low-power modes. A method based on random number generators is adopted for comparing activity modes. We illustrate our approach using five field-programmable gate arrays (FPGAs) that span a range of process technologies: Xilinx Virtex-II Pro, Spartan-3E, Spartan-3AN, Virtex-5, and Silicon Blue iCE65. We find that, despite improvements through process technology and low-power modes, current devices need further improvements to be sufficiently power efficient for mobile applications. The Silicon Blue device demonstrates that performance can be traded off to achieve lower leakage.

References

[1]
I. Kuon and J. Rose, "Measuring the gap between FPGAs and ASICs," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 26, no. 2, pp. 203-215, 2007.
[2]
T. Tuan, A. Rahman, S. Das, S. Trimberger, and S. Kao, "A 90- nm low-power FPGA for battery-powered applications," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 26, no. 2, pp. 296-300, 2007.
[3]
"Groundhog benchmark suite," Tech. Rep., Imperial College, London, UK, 2009, http://cc.doc.ic.ac.uk/projects/ GROUNDHOG/.
[4]
P. Jamieson, T. Becker, W. Luk, P. Y. K. Cheung, T. Rissa, and T. Pitkänen, "Benchmarking reconfigurable architectures in the mobile domain," in Proceedings of IEEE Symposium on Field-Programmable Custom Computing Machines, pp. 1-8, Napa, Calif, USA, April 2009.
[5]
C. Piguet, Low-Power CMOS Circuits, CRC Press, Boca Raton, Fla, USA, 2005.
[6]
O. S. Unsal, J. W. Tschanz, K. Bowman, et al., "Impact of parameter variations on circuits and microarchitecture," IEEE Micro, vol. 26, no. 6, pp. 30-39, 2006.
[7]
V. George, H. Zhang, and J. Rabaey, "The design of a low energy FPGA," in Proceedings of the International Symposium on Low Power Electronics and Design (ISLPED '99), pp. 188- 193, San Diego, Calif, USA, August 1999.
[8]
L. Shang, A. S. Kaviani, and K. Bathala, "Dynamic power consumption in Virtex-II FPGA family," in Proceedings of the 10th ACM International Symposiumon Field Programmable Gate Arrays (FPGA '02), pp. 157-164, Monterey, Calif, USA, February 2002.
[9]
"Virtex-II Pro and Virtex-II Pro X Platform FPGAs: Complete Data Sheet," Xilinx Inc., May 2007.
[10]
A. Gayasen, K. Lee, V. Narayanan, M. Kandemir, M. J. Irwin, and T. Tuan, "A dual-VDD low power FPGA architecture," in Proceedings of the 14th International Conference on Field Programmable Logic and Its Application (FPL '04), vol. 3203, pp. 145-157, Leuven, Belgium, August-September 2004.
[11]
R. Tessier, S. Swaminathan, R. Ramaswamy, D. Goeckel, and W. Burleson, "A reconfigurable, power-efficient adaptive Viterbi decoder," IEEE Transactions on VLSI Systems, vol. 13, no. 4, pp. 484-488, 2005.
[12]
J. Becker, M. Hübner, and M. Ullmann, "Power estimation and power measurement of Xilinx Virtex FPGAs: trade-offs and limitations," in Proceedings of the 16th Symposium on Integrated Circuits and Systems Design (SBCCI '03), pp. 283- 288, Sao Paulo, Brazil, September 2003.
[13]
S. Lopez-Buedo, J. Garrido, and E. Boemo, "Thermal testing on reconfigurable computers," IEEE Design and Test of Computers, vol. 17, no. 1, pp. 84-91, 2000.
[14]
J. Lamoureux and S. J. E. Wilton, "On the trade-off between power and flexibility of FPGA clock networks," ACM Transactions Reconfigurable Technology and Systems, vol. 1, no. 3, pp. 1-33, 2008.
[15]
"Power vs. Performance: The 90 nm Inflection Point," White Paper, Xilinx Inc., 2006.
[16]
"40-nm FPGA Power Management and Advantages," White Paper, Altera Inc., 2008.
[17]
"Spartan-3 Generation FPGA User Guide v.1.2," Xilinx Inc., April 2007.
[18]
"MachXO Family Data Sheet," Lattice, June 2009.
[19]
"Igloo Handbook," Actel, April 2009.
[20]
"iCE65 Ultra Low-Power Programmable Logic Family Data Sheet," SiliconBlue, June 2009.
[21]
D. B. Thomas and W. Luk, "High quality uniform random number generation using LUT optimised state-transition matrices," The Journal of VLSI Signal Processing, vol. 47, no. 1, pp. 77-92, 2007.
[22]
"Using Suspend Mode in Spartan-3 Generation FPGA," Xilinx Inc., May 2007.
[23]
"Virtex-5 Family Platfrom Overview LX and LXT Platforms v2.2," Xilinx Inc., January 2007.

Cited By

View all
  • (2010)Temperature-Power Consumption Relationship and Hot-Spot Migration for FPGA-Based SystemProceedings of the 2010 IEEE/ACM Int'l Conference on Green Computing and Communications & Int'l Conference on Cyber, Physical and Social Computing10.1109/GreenCom-CPSCom.2010.101(392-397)Online publication date: 18-Dec-2010

Index Terms

  1. Power characterisation for fine-grain reconfigurable fabrics

            Recommendations

            Comments

            Please enable JavaScript to view thecomments powered by Disqus.

            Information & Contributors

            Information

            Published In

            cover image International Journal of Reconfigurable Computing
            International Journal of Reconfigurable Computing  Volume 2010, Issue
            Special issue on selected papers from spl 2009 programmable logic and applications
            January 2010
            80 pages
            ISSN:1687-7195
            EISSN:1687-7209
            Issue’s Table of Contents

            Publisher

            Hindawi Limited

            London, United Kingdom

            Publication History

            Published: 01 January 2010
            Accepted: 22 October 2009
            Received: 01 July 2009

            Qualifiers

            • Article

            Contributors

            Other Metrics

            Bibliometrics & Citations

            Bibliometrics

            Article Metrics

            • Downloads (Last 12 months)10
            • Downloads (Last 6 weeks)1
            Reflects downloads up to 18 Dec 2024

            Other Metrics

            Citations

            Cited By

            View all
            • (2010)Temperature-Power Consumption Relationship and Hot-Spot Migration for FPGA-Based SystemProceedings of the 2010 IEEE/ACM Int'l Conference on Green Computing and Communications & Int'l Conference on Cyber, Physical and Social Computing10.1109/GreenCom-CPSCom.2010.101(392-397)Online publication date: 18-Dec-2010

            View Options

            View options

            PDF

            View or Download as a PDF file.

            PDF

            eReader

            View online with eReader.

            eReader

            Login options

            Media

            Figures

            Other

            Tables

            Share

            Share

            Share this Publication link

            Share on social media