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Parallel backprojection: a case study in high-performance reconfigurable computing

Authors:

Miriam LeeserAuthors Info & Claims

EURASIP Journal on Embedded Systems, Volume 2009

Article No.: 1, Pages 1 - 14

https://doi.org/10.1155/2009/727965

Published: 01 January 2009 Publication History

Abstract

High-performance reconfigurable computing (HPRC) is a novel approach to provide large-scale computing power to modern scientific applications. Using both general-purpose processors and FPGAs allows application designers to exploit fine-grained and coarse-grained parallelism, achieving high degrees of speedup. One scientific application that benefits from this technique is backprojection, an image formation algorithm that can be used as part of a synthetic aperture radar (SAR) processing system. We present an implementation of backprojection for SAR on an HPRC system. Using simulated data taken at a variety of ranges, our implementation runs over 200 times faster than a similar software program, with an overall application speedup better than 50x. The backprojection application is easily parallelizable, achieving near-linear speedup when run on multiple nodes of a clustered HPRC system. The results presented can be applied to other systems and other algorithms with similar characteristics.

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Cited By

Park JTang PSmelyanskiy MKim DBenson T(2013)Efficient backprojection-based synthetic aperture radar computation with many-core processorsScientific Programming10.1155/2013/38971321:3-4(165-179)Online publication date: 1-Jul-2013
https://dl.acm.org/doi/10.1155/2013/389713
Park JTang PSmelyanskiy MKim DBenson THollingsworth J(2012)Efficient backprojection-based synthetic aperture radar computation with many-core processorsProceedings of the International Conference on High Performance Computing, Networking, Storage and Analysis10.5555/2388996.2389034(1-11)Online publication date: 10-Nov-2012
https://dl.acm.org/doi/10.5555/2388996.2389034

Index Terms

Parallel backprojection: a case study in high-performance reconfigurable computing

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Information & Contributors

Information

Published In

cover image EURASIP Journal on Embedded Systems

EURASIP Journal on Embedded Systems Volume 2009, Issue

FPGA supercomputing platforms, architectures, and techniques for accelerating computationally complex algorithms

January 2009

75 pages

ISSN:1687-3955

EISSN:1687-3963

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Hindawi Limited

London, United Kingdom

Publication History

Published: 01 January 2009

Accepted: 18 December 2008

Received: 22 June 2008

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Cited By

Park JTang PSmelyanskiy MKim DBenson T(2013)Efficient backprojection-based synthetic aperture radar computation with many-core processorsScientific Programming10.1155/2013/38971321:3-4(165-179)Online publication date: 1-Jul-2013
https://dl.acm.org/doi/10.1155/2013/389713
Park JTang PSmelyanskiy MKim DBenson THollingsworth J(2012)Efficient backprojection-based synthetic aperture radar computation with many-core processorsProceedings of the International Conference on High Performance Computing, Networking, Storage and Analysis10.5555/2388996.2389034(1-11)Online publication date: 10-Nov-2012
https://dl.acm.org/doi/10.5555/2388996.2389034

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