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System-on-chip environment: a SpecC-based framework for heterogeneous MPSoC design

Authors:

Andreas Gerstlauer,

Daniel D. GajskiAuthors Info & Claims

EURASIP Journal on Embedded Systems, Volume 2008

Article No.: 5, Pages 1 - 13

https://doi.org/10.1155/2008/647953

Published: 01 January 2008 Publication History

Abstract

The constantly growing complexity of embedded systems is a challenge that drives the development of novel design automation techniques. C-based system-level design addresses the complexity challenge by raising the level of abstraction and integrating the design processes for the heterogeneous system components. In this article, we present a comprehensive design framework, the system-on-chip environment (SCE) which is based on the influential SpecC language and methodology. SCE implements a top-down system design flow based on a specify-explore-refine paradigm with support for heterogeneous target platforms consisting of custom hardware components, embedded software processors, dedicated IP blocks, and complex communication bus architectures. Starting from an abstract specification of the desired system, models at various levels of abstraction are automatically generated through successive step-wise refinement, resulting in a pin-and cycle-accurate system implementation. The seamless integration of automatic model generation, estimation, and verification tools enables rapid design space exploration and efficient MPSoC implementation. Using a large set of industrial-strength examples with a wide range of target architectures, our experimental results demonstrate the effectiveness of our framework and show significant productivity gains in design time.

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Cited By

Raji MNikseresht M(2022)UMOTS: an uncertainty-aware multi-objective genetic algorithm-based static task scheduling for heterogeneous embedded systemsThe Journal of Supercomputing10.1007/s11227-021-03887-178:1(279-314)Online publication date: 1-Jan-2022
https://dl.acm.org/doi/10.1007/s11227-021-03887-1
Jeong EJeong DHa S(2021)Dataflow Model–based Software Synthesis Framework for Parallel and Distributed Embedded SystemsACM Transactions on Design Automation of Electronic Systems10.1145/344768026:5(1-38)Online publication date: 5-Jun-2021
https://dl.acm.org/doi/10.1145/3447680
Nours SPostula A(2018)A Hybrid Simulation Approach for Fast and Accurate Timing Analysis of Multi-Processor Platforms Considering Communication Resources ConflictsJournal of Signal Processing Systems10.5555/3288382.328840590:12(1667-1685)Online publication date: 1-Dec-2018
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Index Terms

System-on-chip environment: a SpecC-based framework for heterogeneous MPSoC design

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Information & Contributors

Information

Published In

cover image EURASIP Journal on Embedded Systems

EURASIP Journal on Embedded Systems Volume 2008, Issue

C-Based Design of Heterogeneous Embedded Systems

January 2008

97 pages

ISSN:1687-3955

EISSN:1687-3963

Issue’s Table of Contents

Publisher

Hindawi Limited

London, United Kingdom

Publication History

Accepted: 10 June 2008

Revised: 04 March 2008

Published: 01 January 2008

Received: 01 October 2007

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Cited By

Raji MNikseresht M(2022)UMOTS: an uncertainty-aware multi-objective genetic algorithm-based static task scheduling for heterogeneous embedded systemsThe Journal of Supercomputing10.1007/s11227-021-03887-178:1(279-314)Online publication date: 1-Jan-2022
https://dl.acm.org/doi/10.1007/s11227-021-03887-1
Jeong EJeong DHa S(2021)Dataflow Model–based Software Synthesis Framework for Parallel and Distributed Embedded SystemsACM Transactions on Design Automation of Electronic Systems10.1145/344768026:5(1-38)Online publication date: 5-Jun-2021
https://dl.acm.org/doi/10.1145/3447680
Nours SPostula A(2018)A Hybrid Simulation Approach for Fast and Accurate Timing Analysis of Multi-Processor Platforms Considering Communication Resources ConflictsJournal of Signal Processing Systems10.5555/3288382.328840590:12(1667-1685)Online publication date: 1-Dec-2018
https://dl.acm.org/doi/10.5555/3288382.3288405
Huang BZhang HSubramanyan PVizel YGupta AMalik S(2018)Instruction-Level Abstraction (ILA)ACM Transactions on Design Automation of Electronic Systems10.1145/328244424:1(1-24)Online publication date: 21-Dec-2018
https://dl.acm.org/doi/10.1145/3282444
Enrici AApvrille LPacalet R(2017)A Model-Driven Engineering Methodology to Design Parallel and Distributed Embedded SystemsACM Transactions on Design Automation of Electronic Systems10.1145/299953722:2(1-25)Online publication date: 4-Jan-2017
https://dl.acm.org/doi/10.1145/2999537
Teimouri NTabkhi HSchirner GFanucci LTeich J(2016)Improving scalability of CMPs with dense ACCs coverageProceedings of the 2016 Conference on Design, Automation & Test in Europe10.5555/2971808.2972183(1610-1615)Online publication date: 14-Mar-2016
https://dl.acm.org/doi/10.5555/2971808.2972183
Teimouri NTabkhi HSchirner G(2015)Revisiting accelerator-rich CMPsProceedings of the 52nd Annual Design Automation Conference10.1145/2744769.2744902(1-6)Online publication date: 7-Jun-2015
https://dl.acm.org/doi/10.1145/2744769.2744902
Tabkhi HBushey RSchirner G(2015)Conceptual Abstraction Levels (CALs) for managing design complexity of market-oriented MPSoCsMicroprocessors & Microsystems10.1016/j.micpro.2015.07.01639:8(704-719)Online publication date: 1-Nov-2015
https://dl.acm.org/doi/10.1016/j.micpro.2015.07.016
Graf SGlaß MTeich JLauer CFettweis GNebel W(2014)Multi-variant-based design space exploration for automotive embedded systemsProceedings of the conference on Design, Automation & Test in Europe10.5555/2616606.2616616(1-6)Online publication date: 24-Mar-2014
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Mück TFröhlich A(2014)A metaprogrammed C++ framework for hardware/software component integration and communicationJournal of Systems Architecture: the EUROMICRO Journal10.1016/j.sysarc.2014.09.00260:10(816-827)Online publication date: 1-Nov-2014
https://dl.acm.org/doi/10.1016/j.sysarc.2014.09.002
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