More Web Proxy on the site http://driver.im/

article

Free access

Fixed-point configurable hardware components

Authors:

Romuald Rocher,

Olivier SentieysAuthors Info & Claims

EURASIP Journal on Embedded Systems, Volume 2006, Issue 1

Page 20

https://doi.org/10.1155/ES/2006/23197

Published: 01 January 2006 Publication History

Abstract

To reduce the gap between the VLSI technology capability and the designer productivity, design reuse based on IP (intellectual properties) is commonly used. In terms of arithmetic accuracy, the generated architecture can generally only be configured through the input and output word lengths. In this paper, a new kind of method to optimize fixed-point arithmetic IP has been proposed. The architecture cost is minimized under accuracy constraints defined by the user. Our approach allows exploring the fixed-point search space and the algorithm-level search space to select the optimized structure and fixed-point specification. To significantly reduce the optimization and design times, analytical models are used for the fixed-point optimization process.

References

[1]

{1} M. Keating and P. Bricaud, Reuse Methodology Manual, Kluwer Academic, Norwell, Mass, USA, 3rd edition, 2000.

[2]

{2} D. Menard, M. Guitton, S. Pillement, and O. Sentieys, "Design and implementation of WCDMA platforms: challenges and trade-offs," in Proceedings of the International Signal Processing Conference (ISPC '03), pp. 1-6, Dallas, Tex, USA, April 2003.

[3]

{3} R. Seepold and A. Kunzmann, Reuse Techniques for VLSI Design , Kluwer Academic, Boston, Mass, USA, 1999.

[4]

{4} AccelChip., "Creating ip for system generator for dsp using matlab," Tech. Rep. 95035, AccelChip, Milpitas, Calif, USA, 2004.

[5]

{5} P. Banerjee, D. Bagchi, M. Haldar, A. Nayak, V. Kim, and R. Uribe, "Automatic conversion of floating point MATLAB programs into fixed point FPGA based hardware design," in Proceedings of the 11th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '03), pp. 263-264, Napa Valley, Calif, USA, April 2003.

[6]

{6} R. Uribe and T. Cesear, "A methodology for exploring finite-precision effects when solving linear systems of equations with least-squares techniques in fixed-point hardware," in Proceedings of the 9th Annual Workshop on High Performance Embedded Computing (HPEC '05), Lincoln, Neb, USA, September 2005.

[7]

{7} S. Roy and P. Banerjee, "An algorithm for converting floating-point computations to fixed-point in MATLAB based FPGA design," in Proceedings of the 41st Design Automation Conference (DAC '04), pp. 484-487, San Diego, Calif, USA, June 2004.

[8]

{8} S. Roy and P. Banerjee, "An algorithm for trading off quantization error with hardware resources for MATLAB-based FPGA design," IEEE Transactions on Computers, vol. 54, no. 7, pp. 886-896, 2005.

Digital Library

[9]

{9} L. De Coster, M. Adé, R. Lauwereins, and J. A. Peperstraete, "Code generation for compiled bit-true simulation of DSP applications," in Proceedings of the 11th IEEE International Symposium on System Synthesis (ISSS '98), pp. 9-14, Hsinchu, Taiwan, December 1998.

Digital Library

[10]

{10} H. Keding, M. Willems, M. Coors, and H. Meyr, "FRIDGE: a fixed-point design and simulation environment," in Proceedings of the IEEE/ACM conference on Design, Automation and Test in Europe (DATE '98), pp. 429-435, Paris, France, February 1998.

[11]

{11} S. Haykin, Adaptive Filter Theory, Prentice-Hall, Upper Saddle River, NJ, USA, 2nd edition, 1991.

[12]

{12} R. B. Kearfott, "Interval computations: introduction, uses, and resources," Euromath Bulletin, vol. 2, no. 1, pp. 95-112, 1996.

[13]

{13} A. V. Oppenheim and R. W. Schafer, Discrete-Time Signal Processing , Prentice-Hall Signal Processing Series, Prentice-Hall, Upper Saddle River, NJ, USA, 2nd edition, 1999.

[14]

{14} D. Menard, D. Chillet, and O. Sentieys, "Floating-to-fixed-point conversion for digital signal processors," EURASIP Journal on Applied Signal Processing, vol. 2006, Article ID 96421, 19 pages, 2006, special issue design methods for DSP systems.

[15]

{15} B. Widrow, "Statistical analysis of amplitude quantized sampled- data systems," Transactions of the American Institute of Electrical Engineer: Part II: Applications and Industry, vol. 79, pp. 555-568, 1960.

[16]

{16} C. W. Barnes, B. N. Tran, and S. H. Leung, "On the statistics of fixed-point round off error," IEEE Transactions on Acoustics, Speech, and Signal Processing, vol. 33, no. 3, pp. 595-606, 1985.

[17]

{17} G. A. Constantinides, P. Y. K. Cheung, and W. Luk, "Truncation noise in fixed-point SFGs {digital filters}," IEE Electronics Letters, vol. 35, no. 23, pp. 2012-2014, 1999.

[18]

{18} D. Menard, R. Rocher, P. Scalart, and O. Sentieys, "SQNR determination in non-linear and non-recursive fixed-point systems," in Proceedings of the 12th European Signal Processing Conference (EUSIPCO '04), pp. 1349-1352, Vienna, Austria, September 2004.

[19]

{19} R. Rocher, D. Menard, O. Sentieys, and P. Scalart, "Accuracy evaluation of fixed-point LMS algorithm," in Proceedings of IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP '04), vol. 5, pp. 237-240, Montreal, Quebec, Canada, May 2004.

Cited By

Hilaire TChevrel P(2011)Sensitivity-based pole and input-output errors of linear filters as indicators of the implementation deterioration in fixed-point contextEURASIP Journal on Advances in Signal Processing10.1155/2011/8937602011(1-15)Online publication date: 1-Jan-2011
https://dl.acm.org/doi/10.1155/2011/893760
Caffarena GCarreras CLópez JFernández Á(2010)SQNR estimation of fixed-point DSP algorithmsEURASIP Journal on Advances in Signal Processing10.1155/2010/1710272010(1-12)Online publication date: 1-Feb-2010
https://dl.acm.org/doi/10.1155/2010/171027
Novo DLi MFasthuber RRaghavan PCatthoor FSapatnekar S(2010)Exploiting finite precision information to guide data-flow mappingProceedings of the 47th Design Automation Conference10.1145/1837274.1837338(248-253)Online publication date: 13-Jun-2010
https://dl.acm.org/doi/10.1145/1837274.1837338
Show More Cited By

Index Terms

Fixed-point configurable hardware components
1. Hardware
  1. Integrated circuits
    1. Logic circuits
      1. Arithmetic and datapath circuits
  2. Very large scale integration design
    1. Application-specific VLSI designs

Recommendations

Hardware Designs for Decimal Floating-Point Addition and Related Operations

Decimal arithmetic is often used in commercial, financial, and Internet-based applications. Due to the growing importance of decimal floating-point (DFP) arithmetic, the IEEE 754 Draft Standard for Floating-Point Arithmetic (IEEE P754) includes ...
Configurable Multimode Embedded Floating-Point Units for FPGAs

Performance of field-programmable gate arrays (FPGAs) used for floating-point applications is poor due to the complexity of floating-point arithmetic. Implementing floating-point units (FPUs) on FPGAs consume a large amount of resources. This makes ...
On high-performance parallel decimal fixed-point multiplier designs

Display Omitted Simplified logic and structure for 8421-5421 BCD multiplier are proposed.With a novel 4221 BCD full adder, 4221-8421 conversion is no longer needed.4221 BCD multiplier using the new 4221 BCD full adder is proposed.The proposed 8421-5421 ...

Comments

Please enable JavaScript to view thecomments powered by Disqus.

Information & Contributors

Information

Published In

cover image EURASIP Journal on Embedded Systems

EURASIP Journal on Embedded Systems Volume 2006, Issue 1

January 2006

280 pages

ISSN:1687-3955

EISSN:1687-3963

Issue’s Table of Contents

Publisher

Hindawi Limited

London, United Kingdom

Publication History

Published: 01 January 2006

Qualifiers

Article

Contributors

Other Metrics

View Article Metrics

Bibliometrics & Citations

Bibliometrics

Article Metrics

9
Total Citations
View Citations
139
Total Downloads

Downloads (Last 12 months)16
Downloads (Last 6 weeks)2

Reflects downloads up to 11 Dec 2024

Other Metrics

View Author Metrics

Citations

Cited By

Hilaire TChevrel P(2011)Sensitivity-based pole and input-output errors of linear filters as indicators of the implementation deterioration in fixed-point contextEURASIP Journal on Advances in Signal Processing10.1155/2011/8937602011(1-15)Online publication date: 1-Jan-2011
https://dl.acm.org/doi/10.1155/2011/893760
Caffarena GCarreras CLópez JFernández Á(2010)SQNR estimation of fixed-point DSP algorithmsEURASIP Journal on Advances in Signal Processing10.1155/2010/1710272010(1-12)Online publication date: 1-Feb-2010
https://dl.acm.org/doi/10.1155/2010/171027
Novo DLi MFasthuber RRaghavan PCatthoor FSapatnekar S(2010)Exploiting finite precision information to guide data-flow mappingProceedings of the 47th Design Automation Conference10.1145/1837274.1837338(248-253)Online publication date: 13-Jun-2010
https://dl.acm.org/doi/10.1145/1837274.1837338
Pham TTruong AChin WAoshima T(2010)Test Case Generation for Adequacy of Floating-point to Fixed-point ConversionElectronic Notes in Theoretical Computer Science (ENTCS)10.1016/j.entcs.2010.08.048266(49-61)Online publication date: 1-Oct-2010
https://dl.acm.org/doi/10.1016/j.entcs.2010.08.048
Novo DLi MBougard BVan der Perre LCatthoor FBenini LDe Micheli GAl-Hashimi BMueller W(2009)Finite precision processing in wireless applicationsProceedings of the Conference on Design, Automation and Test in Europe10.5555/1874620.1874916(1230-1233)Online publication date: 20-Apr-2009
https://dl.acm.org/doi/10.5555/1874620.1874916
Caffarena GLópez JLeyva GCarreras CNieto-Taladriz O(2009)Architectural synthesis of fixed-point DSP datapaths using FPGAsInternational Journal of Reconfigurable Computing10.1155/2009/7032672009(1-14)Online publication date: 1-Jan-2009
https://dl.acm.org/doi/10.1155/2009/703267
Martel MPuebla GVidal G(2009)Program transformation for numerical precisionProceedings of the 2009 ACM SIGPLAN workshop on Partial evaluation and program manipulation10.1145/1480945.1480960(101-110)Online publication date: 19-Jan-2009
https://dl.acm.org/doi/10.1145/1480945.1480960
Martel M(2009)Enhancing the implementation of mathematical formulas for fixed-point and floating-point arithmeticsFormal Methods in System Design10.1007/s10703-009-0068-y35:3(265-278)Online publication date: 1-Dec-2009
https://dl.acm.org/doi/10.1007/s10703-009-0068-y
Menard DSerizel RRocher RSentieys O(2008)Accuracy constraint determination in fixed-point system designEURASIP Journal on Embedded Systems10.1155/2008/2425842008(1-12)Online publication date: 1-Jan-2008
https://dl.acm.org/doi/10.1155/2008/242584

View Options

View options

PDF

View or Download as a PDF file.

eReader

View online with eReader.

Login options

Check if you have access through your login credentials or your institution to get full access on this article.

Full Access

Get this Publication

Media

Figures

Other

Tables

View Issue’s Table of Contents