Article

SystemC: a modeling platform supporting multiple design abstractions

Author:

Preeti Ranjan PandaAuthors Info & Claims

ISSS '01: Proceedings of the 14th international symposium on Systems synthesis

Pages 75 - 80

https://doi.org/10.1145/500001.500018

Published: 30 September 2001 Publication History

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Abstract

SystemC is a C++ based modeling platform supporting design abstractions at the register-transfer, behavioral, and system levels. Consisting of a class library and a simulation kernel, the language is an attempt at standardization of a C/C++ design methodology, and is supported by the Open SystemC Initiative (OSCI), a consortium of a wide range of system houses, semiconductor companies, Intellectual property (IP) providers, embedded software developers, and design automation tool vendors. The advantages of SystemC include the establishment of a common design environment consisting of C++ libraries, models and tools, thereby setting up a foundation for hardware-software co-design; the ability to exchange IP easily and efficiently; and the ability to reuse test benches across different levels of modeling abstraction. We outline the features of SystemC that make it an attractive language for design specification, verification, and synthesis at different levels of abstraction, with particular emphasis on the new features included in SystemC 2.0 that support system-level design.

References

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The Open SystemC Initiative. http://www.systemc.org.

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Functional specification for SystemC 2.0. http://www.systemc.org, Jan. 2001.

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SystemC: a modeling platform supporting multiple design abstractions

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Published In

ISSS '01: Proceedings of the 14th international symposium on Systems synthesis

September 2001

290 pages

ISBN:1581134185

DOI:10.1145/500001

General Chair:
Roman Hermida
Complutense Universidad, Madrid, Spain
,
Program Chair:
El Mostapha Aboulhamid
Université de Montréal, Québec, Canada

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 30 September 2001

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IEEE
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ISSS01: 14th International Symposium on System Synthesis

September 30 - October 3, 2001

P.Q., Montréal, Canada

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Overall Acceptance Rate 38 of 71 submissions, 54%

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https://doi.org/10.1109/YAC63405.2024.10598449
Tang SZhou XLing M(2024)Modeling Equivariant Neural Networks for Hardware Acceleration, a Case Study on the Molecular Docking Tool DiffDock2024 IEEE Pacific Rim Conference on Communications, Computers and Signal Processing (PACRIM)10.1109/PACRIM61180.2024.10690224(1-6)Online publication date: 21-Aug-2024
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Romashchenko VBrutscheck MChmielewski I(2024)Investigation and Implementation of AI-HDLCoder for Automated VHDL Code Synthesis and Code Generation for Hardware SoC Development2024 35th Irish Signals and Systems Conference (ISSC)10.1109/ISSC61953.2024.10602909(1-6)Online publication date: 13-Jun-2024
https://doi.org/10.1109/ISSC61953.2024.10602909
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