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Recency-based TLB preloading

Authors:

Ashley Saulsbury,

Fredrik Dahlgren,

Per StenströmAuthors Info & Claims

ISCA '00: Proceedings of the 27th annual international symposium on Computer architecture

Pages 117 - 127

https://doi.org/10.1145/339647.339666

Published: 01 May 2000 Publication History

Abstract

Caching and other latency tolerating techniques have been quite successful in maintaining high memory system performance for general purpose processors. However, TLB misses have become a serious bottleneck as working sets are growing beyond the capacity of TLBs.

This work presents one of the first attempts to hide TLB miss latency by using preloading techniques. We present results for traditional next-page TLB miss preloading - an approach shown to cut some of the misses. However, a key contribution of this work is a novel TLB miss prediction algorithm based on the concept of “recency”, and we show that it can predict over 55% of the TLB misses for the five commercial applications considered.

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Cited By

Duong THur J(2024)Contiguity Aware TLB Prefetching for Embedded I/O DevicesIEICE Electronics Express10.1587/elex.21.20240664Online publication date: 2024
https://doi.org/10.1587/elex.21.20240664
Schlüter TChoudhari AHetterich LTrampert LNemati HIbrahim ASchwarz MRossow CTippenhauer NMeng WJensen CCremers CKirda E(2023)FetchBench: Systematic Identification and Characterization of Proprietary PrefetchersProceedings of the 2023 ACM SIGSAC Conference on Computer and Communications Security10.1145/3576915.3623124(975-989)Online publication date: 15-Nov-2023
https://dl.acm.org/doi/10.1145/3576915.3623124
Stojkovic JMantri NSkarlatos DXu TTorrellas J(2023)Memory-Efficient Hashed Page Tables2023 IEEE International Symposium on High-Performance Computer Architecture (HPCA)10.1109/HPCA56546.2023.10071061(1221-1235)Online publication date: Feb-2023
https://doi.org/10.1109/HPCA56546.2023.10071061
Show More Cited By

Index Terms

Recency-based TLB preloading
1. Hardware
  1. Hardware validation
  2. Integrated circuits
    1. Semiconductor memory

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Recency-based TLB preloading
Special Issue: Proceedings of the 27th annual international symposium on Computer architecture (ISCA '00)

Caching and other latency tolerating techniques have been quite successful in maintaining high memory system performance for general purpose processors. However, TLB misses have become a serious bottleneck as working sets are growing beyond the capacity ...

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Information & Contributors

Information

Published In

cover image ACM Conferences

ISCA '00: Proceedings of the 27th annual international symposium on Computer architecture

June 2000

327 pages

ISBN:1581132328

DOI:10.1145/339647

Chairmen:
Alan Berenbaum
Lucent Technologies
,
Joel Emer
Compaq Computer Corp.

ACM SIGARCH Computer Architecture News Volume 28, Issue 2
Special Issue: Proceedings of the 27th annual international symposium on Computer architecture (ISCA '00)
May 2000
325 pages
ISSN:0163-5964
DOI:10.1145/342001
Chairmen:
Alan Berenbaum
Lucent Technologies, Berkeley Heights, NJ
,
Joel Emer
Compaq Computer Corp., Palo Alto, CA
Issue’s Table of Contents

Copyright © 2000 ACM.

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Published: 01 May 2000

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Overall Acceptance Rate 543 of 3,203 submissions, 17%

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Cited By

Duong THur J(2024)Contiguity Aware TLB Prefetching for Embedded I/O DevicesIEICE Electronics Express10.1587/elex.21.20240664Online publication date: 2024
https://doi.org/10.1587/elex.21.20240664
Schlüter TChoudhari AHetterich LTrampert LNemati HIbrahim ASchwarz MRossow CTippenhauer NMeng WJensen CCremers CKirda E(2023)FetchBench: Systematic Identification and Characterization of Proprietary PrefetchersProceedings of the 2023 ACM SIGSAC Conference on Computer and Communications Security10.1145/3576915.3623124(975-989)Online publication date: 15-Nov-2023
https://dl.acm.org/doi/10.1145/3576915.3623124
Stojkovic JMantri NSkarlatos DXu TTorrellas J(2023)Memory-Efficient Hashed Page Tables2023 IEEE International Symposium on High-Performance Computer Architecture (HPCA)10.1109/HPCA56546.2023.10071061(1221-1235)Online publication date: Feb-2023
https://doi.org/10.1109/HPCA56546.2023.10071061
Stojkovic JSkarlatos DKokolis AXu TTorrellas JFalsafi BFerdman MLu SWenisch T(2022)Parallel virtualized memory translation with nested elastic cuckoo page tablesProceedings of the 27th ACM International Conference on Architectural Support for Programming Languages and Operating Systems10.1145/3503222.3507720(84-97)Online publication date: 28-Feb-2022
https://dl.acm.org/doi/10.1145/3503222.3507720
Vavouliotis GAlvarez LGrot BJiménez DCasas M(2021)Morrigan: A Composite Instruction TLB PrefetcherMICRO-54: 54th Annual IEEE/ACM International Symposium on Microarchitecture10.1145/3466752.3480049(1138-1153)Online publication date: 18-Oct-2021
https://dl.acm.org/doi/10.1145/3466752.3480049
Vavouliotis GAlvarez LKarakostas VNikas KKoziris NJimenez DCasas M(2021)Exploiting Page Table Locality for Agile TLB Prefetching2021 ACM/IEEE 48th Annual International Symposium on Computer Architecture (ISCA)10.1109/ISCA52012.2021.00016(85-98)Online publication date: Jun-2021
https://doi.org/10.1109/ISCA52012.2021.00016
Baruah TSun YMojumder SAbellán JUkidave YJoshi ARubin NKim JKaeli DSarkar VKim H(2020)ValkyrieProceedings of the ACM International Conference on Parallel Architectures and Compilation Techniques10.1145/3410463.3414639(455-466)Online publication date: 30-Sep-2020
https://dl.acm.org/doi/10.1145/3410463.3414639
Skarlatos DKokolis AXu TTorrellas JLarus JCeze LStrauss K(2020)Elastic Cuckoo Page TablesProceedings of the Twenty-Fifth International Conference on Architectural Support for Programming Languages and Operating Systems10.1145/3373376.3378493(1093-1108)Online publication date: 9-Mar-2020
https://dl.acm.org/doi/10.1145/3373376.3378493
Achermann RPanwar ABhattacharjee ARoscoe TGandhi JLarus JCeze LStrauss K(2020)Mitosis: Transparently Self-Replicating Page-Tables for Large-Memory MachinesProceedings of the Twenty-Fifth International Conference on Architectural Support for Programming Languages and Operating Systems10.1145/3373376.3378468(283-300)Online publication date: 9-Mar-2020
https://dl.acm.org/doi/10.1145/3373376.3378468
Mirbagher-Ajorpaz SGarza EPokam GJimenez D(2020)CHiRP: Control-Flow History Reuse Prediction2020 53rd Annual IEEE/ACM International Symposium on Microarchitecture (MICRO)10.1109/MICRO50266.2020.00023(131-145)Online publication date: Oct-2020
https://doi.org/10.1109/MICRO50266.2020.00023
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