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A Web-CAD methodology for IP-core analysis and simulation

Authors:

Alessandro Fin,

Franco FummiAuthors Info & Claims

DAC '00: Proceedings of the 37th Annual Design Automation Conference

Pages 597 - 600

https://doi.org/10.1145/337292.337590

Published: 01 June 2000 Publication History

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Abstract

An effective selection of the more suited IP-core, available for a particular design, should be based on some simulation sessions. However, simulation models cannot be close enough to the real models of the core to protect the intellectual property. This paper proposes a Web-CAD methodology for IP-core analysis based on a client/server simulation architecture. The core vendor can make available to the public even the core models used for core synthesis without disclosing IP information. On the other side, the core user can simulate the remote core in the local simulation environment in the same way a local library component is simulated. To achieve this result, some problems concerning the non equivalence of the event driven semantic and the message driven semantic have been analyzed and solved.

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Cited By

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Ahmed WMyers D(2010)Concept-based partitioning for large multidomain multifunctional embedded systemsACM Transactions on Design Automation of Electronic Systems10.1145/1754405.175440715:3(1-41)Online publication date: 10-Jun-2010
https://dl.acm.org/doi/10.1145/1754405.1754407
Wirthlin MMcMurtrey B(2006)Web-based IP evaluation and distribution using appletsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2003.81494622:8(985-994)Online publication date: 1-Nov-2006
https://dl.acm.org/doi/10.1109/TCAD.2003.814946
Yuan LQu GGhout LBouridane A(2006)VLSI Design IP ProtectionProceedings of the first NASA/ESA conference on Adaptive Hardware and Systems10.1109/AHS.2006.77(469-476)Online publication date: 15-Jun-2006
https://dl.acm.org/doi/10.1109/AHS.2006.77
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Information

Published In

DAC '00: Proceedings of the 37th Annual Design Automation Conference

June 2000

819 pages

ISBN:1581131879

DOI:10.1145/337292

Chairman:
Giovanni De Micheli
Stanford Univ., Stanford, CA

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

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Publication History

Published: 01 June 2000

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DAC00: ACM/IEEE-CAS/EDAC Design Automation Conference

June 5 - 9, 2000

California, Los Angeles, USA

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Overall Acceptance Rate 1,770 of 5,499 submissions, 32%

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Cited By

View all

Ahmed WMyers D(2010)Concept-based partitioning for large multidomain multifunctional embedded systemsACM Transactions on Design Automation of Electronic Systems10.1145/1754405.175440715:3(1-41)Online publication date: 10-Jun-2010
https://dl.acm.org/doi/10.1145/1754405.1754407
Wirthlin MMcMurtrey B(2006)Web-based IP evaluation and distribution using appletsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2003.81494622:8(985-994)Online publication date: 1-Nov-2006
https://dl.acm.org/doi/10.1109/TCAD.2003.814946
Yuan LQu GGhout LBouridane A(2006)VLSI Design IP ProtectionProceedings of the first NASA/ESA conference on Adaptive Hardware and Systems10.1109/AHS.2006.77(469-476)Online publication date: 15-Jun-2006
https://dl.acm.org/doi/10.1109/AHS.2006.77
Yuan LQu GSrivastava ALach JQu GIsmail Y(2005)VLSI CAD tool protection by birthmarking design solutionsProceedings of the 15th ACM Great Lakes symposium on VLSI10.1145/1057661.1057743(341-344)Online publication date: 17-Apr-2005
https://dl.acm.org/doi/10.1145/1057661.1057743
Fin AFummi F(2004)Laerte++Languages for system specification10.5555/1016425.1016435(105-117)Online publication date: 1-Jan-2004
https://dl.acm.org/doi/10.5555/1016425.1016435
Siripokarpirom R(2004)Distribution of Bitstream-Level IP Cores for Functional Evaluation Using FPGAsField Programmable Logic and Application10.1007/978-3-540-30117-2_71(700-709)Online publication date: 2004
https://doi.org/10.1007/978-3-540-30117-2_71
Fin AFummi F(2004)LAERTE++: An Object Oriented High-Level TPG for SystemC DesignsLanguages for System Specification10.1007/1-4020-7991-5_7(105-117)Online publication date: 2004
https://doi.org/10.1007/1-4020-7991-5_7
Souza USperb Jde Mello BWagner F(2003)Tangram - virtual integration of heterogeneous IP components in a distributed co-simulation environment16th Symposium on Integrated Circuits and Systems Design, 2003. SBCCI 2003. Proceedings.10.1109/SBCCI.2003.1232817(125-130)Online publication date: 2003
https://doi.org/10.1109/SBCCI.2003.1232817
Petrenko A(2003)Teleworking in computer-aided circuit designThe Experience of Designing and Application of CAD Systems in Microelectronics, 2003. CADSM 2003. Proceedings of the 7th International Conference.10.1109/CADSM.2003.1254974(25-29)Online publication date: 2003
https://doi.org/10.1109/CADSM.2003.1254974
Wirthlin MMcMurtrey BAckland B(2002)IP delivery for FPGAs using Applets and JHDLProceedings of the 39th annual Design Automation Conference10.1145/513918.513922(2-7)Online publication date: 10-Jun-2002
https://dl.acm.org/doi/10.1145/513918.513922
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Parallel Discrete Event Simulation for Multi-Core Systems: Analysis and Optimization

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