[go: up one dir, main page]
More Web Proxy on the site http://driver.im/ skip to main content
10.1145/3322798.3329253acmconferencesArticle/Chapter ViewAbstractPublication PageshpdcConference Proceedingsconference-collections
short-paper

Real-time Multi-process Tracing Decoder Architecture

Published: 17 June 2019 Publication History

Abstract

Tracing is a form of logging by recording the execution information of programs. Since a large amount of data must be created and decoded in real time, a tracer composed mainly of dedicated hardware is widely used. Intel® PT records all information related to software execution from each hardware thread. When the execution of the corresponding software is completed, the accurate program flow can be indicated through the recorded trace data. The hardware trace program can be integrated into the operating system, but in the case of the Windows system, the kernel is not disclosed so tight integration is not achieved. Also, in a Windows environment, it can only trace a single process and do not provide a way to trace multiple process streams. In this paper, we propose a way of extending the PT trace program in order to overcome this shortcoming by supporting multi-process stream tracing in Windows environment.

References

[1]
Y. Liu, P. Shi, X. Wang, H. Chen, B. Zang and H. Guan. 2017. Transparent and efficient cfi enforcement with intel processor trace. The 23rd IEEE Symposium on High Performance Computer Architecture (HPCA). 529--540.
[2]
Y. Gu, Q. Zhao, Y. Zhang and Z. Lin. 2017. PT-CFI: Transparent backward-edge control flow violation detection using intel processor trace. The 7th ACM Conference on Data and Application Security and Privacy (CODASPY). 173--184.
[3]
Napoleon C. Paxton. 2016. Cloud Security: A Review of Current Issues and Proposed Solutions. International Conference on Collaboration and Internet Computing (CIC), 452--455.
[4]
S. Kang et al. 2018. A Study on Extended Processor Trace Decoder Structure for Malicious Code Detection. Journal of Information and Security, 19--24.
[5]
Tahira Mahboob, Maryam Zahid and Gulnoor Ahmad. 2016. Adopting information security techniques for cloud computing-A survey. International Conference on Information Technology, Information Systems and Electrical Engineering (ICITISEE), 7--11.
[6]
Xinyang Ge, Weidong Cui and Trent Jaeger. 2017. GRIFFIN: Guarding Control Flows using Intel Processor Trace. Proceedings of the Twenty-Second International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS'17), 585--598
[7]
Jörg Thalheim, Pramod Bhatotia and Christof Fetzer. 2016. INSPECTOR: Data Provenance Using Intel Processor Trace (PT). International Conference on Distributed Computing Systems (ICDCS), 25--34.
[8]
Khalid El Makkaoui, Abdellah Ezzati, Abderrahim Beni-Hssane and Cina Motamed. 2016. Cloud security and privacy model for providing secure cloud services. The Second International Conference on Cloud Computing Technologies and Applications (CloudTech), 81--86.
[9]
Bob Duncan, Alfred Bratterud and Andreas Happe. 2016. Enhancing cloud security and privacy: Time for a new approach. International Conference on Innovative Computing Technology (INTECH), 110--115.
[10]
WindowsIntelPT. https://github.com/intelpt/WindowsIntelPT

Index Terms

  1. Real-time Multi-process Tracing Decoder Architecture

    Recommendations

    Comments

    Please enable JavaScript to view thecomments powered by Disqus.

    Information & Contributors

    Information

    Published In

    cover image ACM Conferences
    SNTA '19: Proceedings of the ACM Workshop on Systems and Network Telemetry and Analytics
    June 2019
    58 pages
    ISBN:9781450367615
    DOI:10.1145/3322798
    • General Chairs:
    • Jinoh Kim,
    • Alex Sim
    Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

    Sponsors

    Publisher

    Association for Computing Machinery

    New York, NY, United States

    Publication History

    Published: 17 June 2019

    Permissions

    Request permissions for this article.

    Check for updates

    Author Tags

    1. multi-stream decoder
    2. processor trace
    3. software testing

    Qualifiers

    • Short-paper

    Funding Sources

    • Ministry of Science and ICT

    Conference

    HPDC '19
    Sponsor:

    Acceptance Rates

    SNTA '19 Paper Acceptance Rate 22 of 106 submissions, 21%;
    Overall Acceptance Rate 22 of 106 submissions, 21%

    Contributors

    Other Metrics

    Bibliometrics & Citations

    Bibliometrics

    Article Metrics

    • 0
      Total Citations
    • 94
      Total Downloads
    • Downloads (Last 12 months)2
    • Downloads (Last 6 weeks)0
    Reflects downloads up to 03 Mar 2025

    Other Metrics

    Citations

    View Options

    Login options

    View options

    PDF

    View or Download as a PDF file.

    PDF

    eReader

    View online with eReader.

    eReader

    Figures

    Tables

    Media

    Share

    Share

    Share this Publication link

    Share on social media