Cited By
View all- Cheng YGuo XPavlidis V(2022)Emerging monolithic 3D integrationIntegration, the VLSI Journal10.1016/j.vlsi.2022.04.00485:C(97-107)Online publication date: 1-Jul-2022
Digital and Analog-Mixed-Signal In-Memory Processing in CMOS SRAM
Authors: 
Akhilesh Jaiswal, Amogh Agrawal, Indranil Chakraborty, Mustafa Fayez Ali, Kaushik RoyAuthors Info & Claims
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Abstract
No abstract available.
References
[1]
S. Jeloka, et. al. JSSCC, 2018.
[2]
A. Aggrawal et. al. TCAS-I, 2018.
[3]
S. K. Gonugondla, et. al. ISSCC, 2018.
[4]
J. Zhang et. al. JSSCC, 2017.
[5]
A. Biswas, et. al. ISSCC, 2018.
[6]
A. Agrawal et. al. arxiv, 2018.
[7]
Z. Jiang et. al. VLSI, 2018.
[8]
A. Jaiswal, et. al. arxiv, 2018.
Index Terms
- Digital and Analog-Mixed-Signal In-Memory Processing in CMOS SRAM
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Published In
May 2019
562 pages
ISBN:9781450362528
DOI:10.1145/3299874
- General Chairs:
- Houman Homayoun,
- Baris Taskin,
- Program Chairs:
- Tinoosh Mohsenin,
- Weisheng Zhao
Copyright © 2019 Owner/Author.
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Publication History
Published: 13 May 2019
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- CBRIC, a JUMP program sponsored by SRC and DARPA
- Intel Corporation
- DoD Vannevar Bush Faculty Fellowship
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GLSVLSI '19
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Overall Acceptance Rate 312 of 1,156 submissions, 27%
Upcoming Conference
GLSVLSI '25
- Sponsor:
- sigda
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View all- Cheng YGuo XPavlidis V(2022)Emerging monolithic 3D integrationIntegration, the VLSI Journal10.1016/j.vlsi.2022.04.00485:C(97-107)Online publication date: 1-Jul-2022
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