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Block Cooperation: Advancing Lifetime of Resistive Memories by Increasing Utilization of Error Correcting Codes

Authors:

Mohammad Khavari Tavana,

Amir Kavyan Ziabari,

David KaeliAuthors Info & Claims

ACM Transactions on Architecture and Code Optimization (TACO), Volume 15, Issue 3

Article No.: 36, Pages 1 - 26

https://doi.org/10.1145/3243906

Published: 28 August 2018 Publication History

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Abstract

Block-level cooperation is an endurance management technique that operates on top of error correction mechanisms to extend memory lifetimes. Once an error recovery scheme fails to recover from faults in a data block, the entire physical page associated with that block is disabled and becomes unavailable to the physical address space. To reduce the page waste caused by early block failures, other blocks can be used to support the failed block, working cooperatively to keep it alive and extend the faulty page’s lifetime.

We combine the proposed technique with existing error recovery schemes, such as Error Correction Pointers (ECP) and Aegis, to increase memory lifetimes. Block cooperation is realized through metadata sharing in ECP, where one data block shares its unused metadata with another data block. When combined with Aegis, block cooperation is realized through reorganizing data layout, where blocks possessing few faults come to the aid of failed blocks, bringing them back from the dead.

Our evaluation using Monte Carlo simulation shows that block cooperation at a single level (or multiple levels) on top of ECP and Aegis, boosts memory lifetimes by 28% (37%) and 8% (14%) on average, respectively. Furthermore, using trace-driven benchmark evaluation shows that lifetime boost can reach to 68% (30%) exploiting metadata sharing (or data layout reorganization).

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Cited By

Ye CChen MJiang QWang C(2024)Hercules: Enabling Atomic Durability for Persistent Memory with Transient Persistence DomainACM Transactions on Embedded Computing Systems10.1145/360747323:6(1-34)Online publication date: 11-Sep-2024
https://dl.acm.org/doi/10.1145/3607473
Zhang JWang CZhu ZKline DJones AYang HWang Y(2023)Realizing Extreme Endurance Through Fault-aware Wear Leveling and Improved Tolerance2023 IEEE International Symposium on High-Performance Computer Architecture (HPCA)10.1109/HPCA56546.2023.10071093(964-976)Online publication date: Feb-2023
https://doi.org/10.1109/HPCA56546.2023.10071093
Yavits LOrosa LMahar SFerreira JErez MGinosar RMutlu O(2020)WoLFRaM: Enhancing Wear-Leveling and Fault Tolerance in Resistive Memories using Programmable Address Decoders2020 IEEE 38th International Conference on Computer Design (ICCD)10.1109/ICCD50377.2020.00044(187-196)Online publication date: Oct-2020
https://doi.org/10.1109/ICCD50377.2020.00044

Index Terms

Block Cooperation: Advancing Lifetime of Resistive Memories by Increasing Utilization of Error Correcting Codes
1. Computer systems organization
  1. Dependable and fault-tolerant systems and networks
    1. Processors and memory architectures
    2. Reliability
2. Hardware
  1. Emerging technologies
    1. Memory and dense storage
  2. Integrated circuits
    1. Semiconductor memory
      1. Non-volatile memory

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Published In

cover image ACM Transactions on Architecture and Code Optimization

ACM Transactions on Architecture and Code Optimization Volume 15, Issue 3

September 2018

322 pages

ISSN:1544-3566

EISSN:1544-3973

DOI:10.1145/3274266

Editor:
Koen De Bosschere
Ghent University

Issue’s Table of Contents

Copyright © 2018 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Publication History

Published: 28 August 2018

Accepted: 01 July 2018

Revised: 01 June 2018

Received: 01 March 2018

Published in TACO Volume 15, Issue 3

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Cited By

Ye CChen MJiang QWang C(2024)Hercules: Enabling Atomic Durability for Persistent Memory with Transient Persistence DomainACM Transactions on Embedded Computing Systems10.1145/360747323:6(1-34)Online publication date: 11-Sep-2024
https://dl.acm.org/doi/10.1145/3607473
Zhang JWang CZhu ZKline DJones AYang HWang Y(2023)Realizing Extreme Endurance Through Fault-aware Wear Leveling and Improved Tolerance2023 IEEE International Symposium on High-Performance Computer Architecture (HPCA)10.1109/HPCA56546.2023.10071093(964-976)Online publication date: Feb-2023
https://doi.org/10.1109/HPCA56546.2023.10071093
Yavits LOrosa LMahar SFerreira JErez MGinosar RMutlu O(2020)WoLFRaM: Enhancing Wear-Leveling and Fault Tolerance in Resistive Memories using Programmable Address Decoders2020 IEEE 38th International Conference on Computer Design (ICCD)10.1109/ICCD50377.2020.00044(187-196)Online publication date: Oct-2020
https://doi.org/10.1109/ICCD50377.2020.00044

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