A. DeHon. "DPGA-Coupled Microprocessors: Commodity ICs for the Early 21 st Century", Proc. of the IEEE Workshop on FPGAs for Custom Computing Machines, April 1994.

Crossref

Google Scholar

[8]

H. De Man, E Catthoor, G. Goossens, J. Vanhoof, J. Van Meerbergen, S. Note, J.A. Huisken, "Architecture-driven synthesis techniques for VLSI implementation of DSP algorithms", Proceedings oflEEE, vol.72, no.2, pp.319-335, February 1990.

Google Scholar

[9]

C.A.R. Hoare. Communicating Sequential Processes. Prentice-Hall, 1985.

Digital Library

Google Scholar

[10]

J. R. Hauser, J. Wawrzynek. "A MIPS Processor with a Reconfigurable Coprocessor" Proc. Symposium on Field-Programmable Custom Computing Machines (FCCM), April 16-18, 1997.

Digital Library

Google Scholar

[11]

B. W. Kernighan, D. M. Ritchie. The C Programming Language, Prentice-Hall, Englewood Cliffs, New Jersey, 1978.

Digital Library

Google Scholar

[12]

J. Larus, SPIM (http://www.cs.wisc.edu/ larus/spim.html), a MIPS R2000/R3000 simulator

Google Scholar

[13]

B. Lin. "Software synthesis of process-based concurrent programs", ACM/IEEE Design Automation Conference, June 1998.

Digital Library

Google Scholar

[14]

D. P. Lopresti, "P-NAC: A Systolic Array for Comparing Nucleic Acid Sequences", Computer, vol. 20(7), pp. 98-99, 1993.

Digital Library

Google Scholar

[15]

L. Moll, J. Vuillemin, P. Boucard. "High-energy Physics on DECPeRLe-1 Programmable Active Memory", ACM International Symposium on FPGAs, Monterey, February 1995.

Digital Library

Google Scholar

[16]

I. Page. "Constructing Hardware-Software Systems from a Single Description", Submitted to VLSI signal processing, July 1995.

Google Scholar

[17]

J.L. Peterson. Petri net Theory and Modeling of Systems, Prentice Hall, 1981.

Digital Library

Google Scholar

[18]

A.W. Roscoe, C. A. R. Hoare. "Laws of occam programming", Theoretical Computer Science, 60, 177-229, (1988).

Digital Library

Google Scholar

[19]

R. M. Stallman, Using and porting GNU CC, Free Software Foundation, June 1993.

Google Scholar

[20]

S. Vercauteren, D. Verkest, G. de Jong, B. Lin, "Derivation of formal representations from process-based specification and implementation models", Proc. of lSSS' 97, September 1997.

Digital Library

Google Scholar

[21]

J. Villasenor, B. Schoner, K. N. Chia, C. Zapata, H. J. Kim, C. Jones, S. Lansing, B. Mangione-Smith. "Configurable Computing Solutions for Automatic Target Recognition", IEEE Symposium on FPGAs for Custom Computing Machines (FCCM' 96), April 1996.

Google Scholar

[22]

J. Vuillemin, P. Bertin, D. Roncin, M. Shand, H. Touati, P. Boucard. "Programmable Active Memories: Reconfigurable Systems Come of Age", IEEE Transactions on VLSI Sysetms, March 1996, vol. 4, (no. 1):56-69.

Digital Library

Google Scholar

[23]

M. J. Wirthlin, B. L. Hutchings. "DISC: The dynamic instruction set computer", Field Programmable Gate Arrays (FPGAs) for Fast Board Development and Reconfigurable Computing, Proc. SPIE 2607, pp. 92-103 (1995).

Digital Library

Google Scholar

[24]

R. D. Wittig, P. Chow, "OneChip: An FPGA Processor with Reconfigurable Logic", IEEE Symposium on FPGAs for Custom Computing Machines, April 1996.

Crossref

Google Scholar

[25]

Altera Corporation (http://www.altera.com), RIPPIO Programming Board, California.

Google Scholar

[26]

Exemplar (http://www.exemplar.com), Leonardo Spectrum, Alameda, CA.

Google Scholar

[27]

Frontier Design System (http://www.frontierd.com), ART and DSP- Station, Leuven, Belgium.

Google Scholar

[28]

National Semiconductor Corporation, Napa 1000 Data Sheet, (http://www.national.com/appinfo/milaero/napa 1000), 1997.

Google Scholar

[29]

Synopsys (http://www.synopsys.com), Behavioral Compiler, Mountain View, CA.

Google Scholar

[30]

Synopsys (http://www.synopsys.com), FPGA Express, Mountain View, CA.

Google Scholar

[31]

Synplicity (http://www.synplicity.com), Synplify, Sunnyvale, CA.

Google Scholar

[32]

Virtual Computer Corporation (http://www.vcc.com), California.

Google Scholar

[33]

Xilinx (http://www.xilinx.com), Foundation Series Software, California.

Google Scholar

[34]

Xilinx Corporation (http://www.xilinx.com), California.

Google Scholar

Cited By

View all

Lyle GChen SPattabiraman KKalbarczyk ZIyer R(2009)An end-to-end approach for the automatic derivation of application-aware error detectors2009 IEEE/IFIP International Conference on Dependable Systems & Networks10.1109/DSN.2009.5270291(584-589)Online publication date: Jun-2009
https://doi.org/10.1109/DSN.2009.5270291
Gokhale MAhrens CFrigo JWolinski C(2004)Communications Scheduling for Concurrent Processes on Reconfigurable Computers12th Annual IEEE Symposium on Field-Programmable Custom Computing Machines10.1109/FCCM.2004.22(186-193)Online publication date: 2004
https://doi.org/10.1109/FCCM.2004.22
Wolinski CKuchcinski KGokhale M(2004)A constraints programming approach to communication scheduling on SoPC architecturesEuromicro Symposium on Digital System Design, 2004. DSD 2004.10.1109/DSD.2004.1333291(308-315)Online publication date: 2004
https://doi.org/10.1109/DSD.2004.1333291
Show More Cited By

Index Terms

Hardware compilation for FPGA-based configurable computing machines
1. Hardware
  1. Hardware test
  2. Robustness
    1. Hardware reliability

Recommendations

Automatic Compilation of C Applications for FPGA-Based Hardware Acceleration
PAAP '11: Proceedings of the 2011 Fourth International Symposium on Parallel Architectures, Algorithms and Programming

Advancement in design tools is necessary to bridge the widening productivity gap between hardware design and software development in state-of-the-art Field Programmable Gate Arrays (FPGA). We present a design exploration framework that automatically ...
Configurable Processors for Embedded Computing

We have all heard about the increasing software content of embedded systems. To those who think of embedded software as autonomous programs hidden deep within the system, plugging away transparently and reliably on dedicated tasks, this increase might ...
Efficient FPGA hardware development: A multi-language approach

This paper presents a multi-language framework to FPGA hardware development which aims to satisfy the dual requirement of high-level hardware design and efficient hardware implementation. The central idea of this framework is the integration of ...

Comments

Please enable JavaScript to view thecomments powered by Disqus.

Information & Contributors

Information

Published In

DAC '99: Proceedings of the 36th annual ACM/IEEE Design Automation Conference

June 1999

1000 pages

ISBN:1581131097

DOI:10.1145/309847

Editor:
Mary Jane Irwin

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

Publisher

Association for Computing Machinery

New York, NY, United States

Publication History

Published: 01 June 1999

Permissions

Request permissions for this article.

Request Permissions

Check for updates

Qualifiers

Article

Conference

DAC99

Sponsor:

EDAC
SIGDA
IEEE-CAS

DAC99: The 36th ACM/IEEE-CAS/EDAC Design Automation Conference

June 21 - 25, 1999

Louisiana, New Orleans, USA

Acceptance Rates

DAC '99 Paper Acceptance Rate 154 of 451 submissions, 34%;

Overall Acceptance Rate 1,770 of 5,499 submissions, 32%

Upcoming Conference

DAC '25

Sponsor:
sigda

62nd ACM/IEEE Design Automation Conference

June 22 - 26, 2025

San Francisco , CA , USA

Contributors

Other Metrics

View Article Metrics

Bibliometrics & Citations

Bibliometrics

Article Metrics

6
Total Citations
View Citations
436
Total Downloads

Downloads (Last 12 months)20
Downloads (Last 6 weeks)3

Reflects downloads up to 19 Dec 2024

Other Metrics

View Author Metrics

Citations

Cited By

View all

Lyle GChen SPattabiraman KKalbarczyk ZIyer R(2009)An end-to-end approach for the automatic derivation of application-aware error detectors2009 IEEE/IFIP International Conference on Dependable Systems & Networks10.1109/DSN.2009.5270291(584-589)Online publication date: Jun-2009
https://doi.org/10.1109/DSN.2009.5270291
Gokhale MAhrens CFrigo JWolinski C(2004)Communications Scheduling for Concurrent Processes on Reconfigurable Computers12th Annual IEEE Symposium on Field-Programmable Custom Computing Machines10.1109/FCCM.2004.22(186-193)Online publication date: 2004
https://doi.org/10.1109/FCCM.2004.22
Wolinski CKuchcinski KGokhale M(2004)A constraints programming approach to communication scheduling on SoPC architecturesEuromicro Symposium on Digital System Design, 2004. DSD 2004.10.1109/DSD.2004.1333291(308-315)Online publication date: 2004
https://doi.org/10.1109/DSD.2004.1333291
Self RFleury MDownton A(2003)Design methodology for construction of asynchronous pipelines with Handel-CIEE Proceedings - Software10.1049/ip-sen:20030206150:1(39)Online publication date: 2003
https://doi.org/10.1049/ip-sen:20030206
Snider GShackleford BCarter RHauck S(2001)Attacking the semantic gap between application programming languages and configurable hardwareProceedings of the 2001 ACM/SIGDA ninth international symposium on Field programmable gate arrays10.1145/360276.360322(115-124)Online publication date: 1-Feb-2001
https://dl.acm.org/doi/10.1145/360276.360322
Hammami OKuroda KZhao QSaito K(2000)Coevolvable hardware platform for automatic hardware design of neural networksProceedings of IEEE International Conference on Industrial Technology 2000 (IEEE Cat. No.00TH8482)10.1109/ICIT.2000.854208(509-514)Online publication date: 2000
https://doi.org/10.1109/ICIT.2000.854208

View Options

View options

PDF

View or Download as a PDF file.

PDF

eReader

View online with eReader.

eReader

Login options

Check if you have access through your login credentials or your institution to get full access on this article.

Cited By

Index Terms

Recommendations

Automatic Compilation of C Applications for FPGA-Based Hardware Acceleration

Configurable Processors for Embedded Computing

Efficient FPGA hardware development: A multi-language approach