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Clock design of 300MHz 128-bit 2-way superscalar microprocessor

Published: 28 January 2000 Publication History
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References

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E. G. Friedman, "Clock Distribution Networks in VLSI Circuits and Systems," IEEE Press, pp.1-36, 1995.
[2]
Charles F. Webb, et al., "A 400MHz S/390 Microprocessor," IEEE ISSCC Digest of Technical Papers, Vol.40, pp.168-169, 1997.
[3]
D. W. Dobberpuhl, et al., "A 200-MHz 64-b Dual Issue CMOS Microprocessor," IEEE Journal of Solid State Circuits, Vol.SC-27, No.11, pp.1555-1565, 1997.
[4]
H. Fair and D. Bailey, "Clocking Design and Analysis for a 600MHz Alpha Microprocessor," IEEE ISSCC Digest of Technical Papers, Vol.41, pp.398-399, 1998.
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N. Rohrer, et al., "A 480MHz RISC Microprocessor in a 0.12um Leff CMOS Technology with Copper Interconnects," IEEE ISSCC Digest of Technical Papers, Vol.41, pp.240-241, 1998.
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K. Kutaragi, et al., "A Microprocessor with a 128b CPU, 10 Floating- Point MACs, 4 Floating-Point Dividers, and an MPEG2 Decoder," IEEE ISSCC Digest of Technical Papers, Vol.42, pp.256-257, 1999.
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F. Michael Raam, et al., "A High Bandwidth Superscalar Microprocessor for Multimedia Applications," IEEE ISSCC Digest of Technical Papers, Vol.42, pp.258-259, 1999.
[8]
R. -S. Tsay, "Exact Zero Skew," Proceedings ICCAD 91, pp336-339, 1991.
[9]
F. Minami, et al., "Clock tree synthesis based on RC delay balancing," Proceedings CICC 92, pp28.3.1-4, 1992.
[10]
J. L. Neves and E. G. Friedman, "Circuit Synthesis of Clock Distribution Networks Base on Non-Zero Clock Skew," Proceedings of IEEE International Symposium on Circuits and Systems, 1994.
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R. Khanna, et al., "A 0.25mm x86 Microprocessor with a 100MHz Socket 7 Interface," IEEE ISSCC Digest of Technical Papers, Vol.41, pp.242-243, 1998.
[12]
N. Higashi, "A 2.5GFLOPS 6.5M Polygons per Second 4-Way VLIW Geometry Processor with SIMD Instructions and a Software Bypass Mechanism,' IEEE ISSCC Digest of Technical Papers, Vol.42, pp.226- 227, 1999.

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  • (2000)Importance of CAD tools and methodology in high speed CPU designProceedings of the 2000 Asia and South Pacific Design Automation Conference10.1145/368434.368842(631-634)Online publication date: 28-Jan-2000
  • (2000)Importance of CAD tools and methodologies in high speed CPU designProceedings 2000. Design Automation Conference. (IEEE Cat. No.00CH37106)10.1109/ASPDAC.2000.835176(631-633)Online publication date: 2000

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cover image ACM Conferences
ASP-DAC '00: Proceedings of the 2000 Asia and South Pacific Design Automation Conference
January 2000
691 pages
ISBN:0780359747
DOI:10.1145/368434
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Published: 28 January 2000

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View all
  • (2000)Importance of CAD tools and methodology in high speed CPU designProceedings of the 2000 Asia and South Pacific Design Automation Conference10.1145/368434.368842(631-634)Online publication date: 28-Jan-2000
  • (2000)Importance of CAD tools and methodologies in high speed CPU designProceedings 2000. Design Automation Conference. (IEEE Cat. No.00CH37106)10.1109/ASPDAC.2000.835176(631-633)Online publication date: 2000

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