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Implications of structured programming for machine architecture

Author:

Andrew S. TanenbaumAuthors Info & Claims

Communications of the ACM, Volume 21, Issue 3

Pages 237 - 246

https://doi.org/10.1145/359361.359454

Published: 01 March 1978 Publication History

Abstract

Based on an empirical study of more than 10,000 lines of program text written in a GOTO-less language, a machine architecture specifically designed for structured programs is proposed. Since assignment, CALL, RETURN, and IF statements together account for 93 percent of all executable statements, special care is given to ensure that these statements can be implemented efficiently. A highly compact instruction encoding scheme is presented, which can reduce program size by a factor of 3. Unlike a Huffman code, which utilizes variable length fields, this method uses only fixed length (1-byte) opcode and address fields. The most frequent instructions consist of a single 1-byte field. As a consequence, instruction decoding time is minimized, and the machine is efficient with respect to both space and time.

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Cited By

Jungwirth PScott AKondamadugula SXiao Z(2024)Alabama A&M Symmetric Overloaded Reduced Instruction Set Architecture (SORA)SoutheastCon 202410.1109/SoutheastCon52093.2024.10500141(1268-1273)Online publication date: 15-Mar-2024
https://doi.org/10.1109/SoutheastCon52093.2024.10500141
Jungwirth PScott AXiao Z(2023)Alabama A&M Symmetric Overloaded Minimal Instruction Set Architecture (SOMA)SoutheastCon 202310.1109/SoutheastCon51012.2023.10115149(53-59)Online publication date: 1-Apr-2023
https://doi.org/10.1109/SoutheastCon51012.2023.10115149
Govindasamy VArasteh EDömer R(2023)Minimizing Memory Contention in an APNG Encoder Using a Grid of Processing CellsDesigning Modern Embedded Systems: Software, Hardware, and Applications10.1007/978-3-031-34214-1_9(101-112)Online publication date: 11-Jun-2023
https://doi.org/10.1007/978-3-031-34214-1_9
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Index Terms

Implications of structured programming for machine architecture
1. Computer systems organization
  1. Architectures
    1. Parallel architectures
      1. Very long instruction word
    2. Serial architectures
      1. Complex instruction set computing
      2. Reduced instruction set computing
2. Software and its engineering
  1. Software creation and management
    1. Designing software
      1. Software implementation planning
        Software design techniques
    2. Software development techniques
  2. Software notations and tools
    1. General programming languages
      1. Language features

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Published In

cover image Communications of the ACM

Communications of the ACM Volume 21, Issue 3

March 1978

54 pages

ISSN:0001-0782

EISSN:1557-7317

DOI:10.1145/359361

Editor:
Robert L. Ashenhurst
The Univ. of Chicago, Chicago, IL

Issue’s Table of Contents

Copyright © 1978 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 01 March 1978

Published in CACM Volume 21, Issue 3

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Cited By

Jungwirth PScott AKondamadugula SXiao Z(2024)Alabama A&M Symmetric Overloaded Reduced Instruction Set Architecture (SORA)SoutheastCon 202410.1109/SoutheastCon52093.2024.10500141(1268-1273)Online publication date: 15-Mar-2024
Jungwirth PScott AXiao Z(2023)Alabama A&M Symmetric Overloaded Minimal Instruction Set Architecture (SOMA)SoutheastCon 202310.1109/SoutheastCon51012.2023.10115149(53-59)Online publication date: 1-Apr-2023
Govindasamy VArasteh EDömer R(2023)Minimizing Memory Contention in an APNG Encoder Using a Grid of Processing CellsDesigning Modern Embedded Systems: Software, Hardware, and Applications10.1007/978-3-031-34214-1_9(101-112)Online publication date: 11-Jun-2023
Dellios ADrummond POpanchuk BTeh RReid M(2022)Simulating macroscopic quantum correlations in linear networksPhysics Letters A10.1016/j.physleta.2021.127911429(127911)Online publication date: Mar-2022
KEARNS JQUAMMEN D(2013)Efficient Ada multitasking on a RISC register window architecture6th Computers in Aerospace VI Conference10.2514/6.1987-2782Online publication date: 18-Feb-2013
Hennessy JPatterson D(2011)Computer Architecture, Fifth EditionundefinedOnline publication date: 29-Sep-2011
Ma KFoster J(2007)Inferring aliasing and encapsulation properties for javaACM SIGPLAN Notices10.1145/1297105.129705942:10(423-440)Online publication date: 21-Oct-2007
Elkarablieh BKhurshid SVu DMcKinley K(2007)StarcACM SIGPLAN Notices10.1145/1297105.129705642:10(387-404)Online publication date: 21-Oct-2007
Rinard M(2007)Using early phase termination to eliminate load imbalances at barrier synchronization pointsACM SIGPLAN Notices10.1145/1297105.129705542:10(369-386)Online publication date: 21-Oct-2007
Shaner SLeavens GNaumann D(2007)Modular verification of higher-order methods with mandatory calls specified by model programsACM SIGPLAN Notices10.1145/1297105.129705342:10(351-368)Online publication date: 21-Oct-2007
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