DMA-circular: an enhanced high level programmable DMA controller for optimized management of on-chip local memories
Authors: 
Nikola Vujic, Lluc Alvarez, Marc Gonzalez, Xavier Martorell, Eduard AyguadeAuthors Info & Claims
Pages 113 - 122
Abstract
This paper presents DMA-circular, a novel DMA controller for optimized memory management for on-chip local memories. DMA-circular embeds the functionality of caches into the DMA controller and applies aggressive optimizations using novel hardware. DMA-circular anticipates the computation requirements in terms of data transfers and performs buffer management for data that is mapped to the local memory. The explicit hardware support accelerates the most common actions related to the management of a local memory while the cache functionalities enable a high level of programmability for the DMA-circular. The evaluation is done on several high performance kernels from the NAS benchmark suite. Compared to traditional DMA controllers, results show speedups from 1.20x to 2x, keeping the control code overhead under 15% of the kernels' execution time and also reducing the energy consumption up to 40%.
References
[1]
D. Bailey et al. The nas parallel benchmarks. In SC'91, pages 158--165, 1991.
[2]
J. Balart et al. A novel asynchronous software cache implementation for the cell-be processor. In LCPC'07, pages 125--140, 2007.
[3]
R. Banakar et al. Scratchpad memory: design alternative for cache on-chip memory in embedded systems. In CODES'02, pages 73--78, 2002.
[4]
D. Brooks, V. Tiwari, and M. Martonosi. Wattch: a framework for architectural-level power analysis and optimizations. In ISCA'00, pages 83--94. ACM, 2000.
[5]
T. Chen et al. Optimizing the use of static buffers for dma on a cell chip. In LCPC'07, pages 314--329, 2007.
[6]
H. Cho et al. Dynamic data scratchpad memory management for a memory subsystem with an MMU. In LCTES'07, pages 195--206, 2007.
[7]
A. Deutsch. Interprocedural may-alias analysis for pointers: beyond k-limiting. In PLDI'94, 1994.
[8]
A. E. Eichenberger et al. Optimizing compiler for the cell processor. In PACT'05, pages 161--172, 2005.
[9]
A. E. Eichenberger et al. Using advanced compiler technology to exploit the performance of the cell broadband engineTMarchitecture. IBM Systems Journal, 2006.
[10]
A. Gonzalez et al. A data cache with multiple caching strategies tuned to different types of locality. In ICS'95, pages 338--347, 1995.
[11]
M. Gonzalez et al. Hybrid access-specific software cache techniques for the cell be architecture. In PACT'08, pages 292--302, 2008.
[12]
W. Landi et al. A safe approximate algorithm for interprocedural aliasing. In PLDI'92, 1992.
[13]
T. Liu et al. DBDB: optimizing DMATransfer for the cell be architecture. In ICS'09, pages 36--45, 2009.
[14]
V. Milutinovic et al. The Split Spatial/Non-Spatial Cache: A Performance and Complexity Evaluation. Newsletter of TCCA, pages 3--10, 1999.
[15]
Y. Paek et al. Efficient and precise array access analysis. TOPLAS'02, 24(1):65--109, 2002.
[16]
R. Ravindran et al. Compiler-managed partitioned data caches for low power. In LCTES'07, pages 237--247, 2007.
[17]
J. Rivers et al. Reducing conflicts in direct-mapped caches with a temporality-based design. In ICPP'02, pages 154--163, 2002.
[18]
S. Seo et al. Design and implementation of software-managed caches for multicores with local memory. In HPCA'09, pages 55--66, 2009.
[19]
O. S. Unsal et al. Cool-cache for hot multimedia. In MICRO'01, pages 274--283, 2001.
[20]
R. P. Wilson et al. Efficient context-sensitive pointer analysis for c programs. In PLDI'95, 1995.
[21]
E. Witchel et al. Direct addressed caches for reduced power consumption. In MICRO'01, pages 124--133, 2001.
[22]
M. T. Yourst. PTLsim: A Cycle Accurate Full System x86-64 Microarchitectural Simulator. In ISPASS'07, pages 23--34, 2007.
Index Terms
- DMA-circular: an enhanced high level programmable DMA controller for optimized management of on-chip local memories
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Information
Published In
May 2012
320 pages
ISBN:9781450312158
DOI:10.1145/2212908
- General Chair:
- John Feo,
- Program Chairs:
- Paolo Faraboschi,
- Oreste Villa
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Published: 15 May 2012
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