[go: up one dir, main page]
More Web Proxy on the site http://driver.im/ skip to main content
10.1145/2818567.2818685acmotherconferencesArticle/Chapter ViewAbstractPublication PagesiccctConference Proceedingsconference-collections
research-article

Reversible Comparator Circuit Using a New Reversible Gate

Published: 25 September 2015 Publication History

Abstract

Traditional electronics is ruling the digital world since long. Investigations have proved limitations of traditional electronics, and researchers are adopting new technologies to overcome these limitations. Quantum computing, nanotechnology, optical computing, low-power computing, etc. have become prominent fields of research in recent times. Reversible Logic is one of the emerging areas to this list to add. Quantum logic is reversible with very-low heat emission. This is one of the reasons why reversible logic and computing are turning popular areas of study and research. This paper presents a new reversible gate with its quantum representation. This gate can also be used to perform basic logical operations like OR, AND, NOT and XOR. This work also considers the design of digital comparators as they are widely used in arithmetic logic units, digital signal processors, etc. Single-bit comparators are designed using the proposed gate, and their performances are analyzed. Designs of multi-bit comparator circuits are also presented starting with a circuit for comparing two bits.

References

[1]
Abbasalizadeh, S., Forouzandeh, B. and Aghababa, H. 4 Bit Comparator Design Based on Reversible Logic Gates. Lecture notes on Information Theory. 1, 3 (Sept 2013).
[2]
Allahyari-Abhari, A., Wille, R. and Drechsler, R. An examination of the NCV-|v1> Quantum Library Based on Minimal Circuits. In Proceedings of the 45th International Symposium on Multiple-Valued Logic (Waterloo, Canada, 2015).
[3]
Al-Rabadi, A. N. Closed--System quantum logic network implementation of the viterbi algorithm. Facta Universitatis Ser. Elec. Energ. 22, 1(April 2009), 1--13.
[4]
Bennet, C. H. Logical reversibility of computation. IBM J. Res. Dev. 17, 525, (1973).
[5]
Barenco, A., Bennet, C. H., Cleve, R., DiVinchenzo, D., Margolus, N., Shor, P., Sleator, T., Smolin, J. and Weinfurter, H. Elementary gates for quantum computation. The American Physical Society. 52 (March 1995), 3457--3467.
[6]
Dehghan, B., Roozbeh, A. and Zare, J. Design of Low Power Comparator Using DG Gate. Circuits and Systems (2014), 7--12.
[7]
Fredkin, E. and Toffoli, T. Conservative logic. Intl. J. Theoritical Physics. 21(1982), 219--253.
[8]
Feynman, R. Quantum Mehcanical Computers. Optics News. 11(1985), 11--20.
[9]
Garipelly, R., Kiran, P. M. and Kumar A. S. A Review on Reversible Logic Gates and their Implementation. International Journal of Emerging Technology and And Advanced Engineering. 3, 3 (March 2013).
[10]
Hung, W. N. N., Song, X., Yang, G. and Perkowski, M. Quantum Logic Synthesis by Symbolic Reachability Analysis. In Proc. of the Design and Automation Conference. (San Diego, California, USA, June 7-11, 2004), 838--841.
[11]
Kerntopf, P., Perkowaski, M. A. and Khan, M. H. A. On Universality of General Reversible Multiple-Valued Logic Gates. In Proc. of the 34th International Symposium on Multiple-Valued Logic. (May 19-22, 2004), 68--73. DOI= 10.1109/ISMVL.2004.1319922.
[12]
Landauer, R. Irreversibilty and heat generation in the computing process. IBM J. Res. Dev. 5, 183(1961).
[13]
Nagamani, A. N., Jayashree, H. V. and Bhagyalakshmi, H. R. Novel low Power Comparator Design using Reversible Logic Gates. International Journal of Computer Science and Engineering. 2, 4(Aug--Sep 2011).
[14]
Parhami, B. Fault Tolerant Reversible Circuits. In Proc. of the 40th Asilomar Conf. Signals, systems and Computers. (Pacific Grooves, CA, October 2006).
[15]
Peres, A. Reversible Logic and Quantum Computers. Physical Review A. 32 (1985), 3266--3276.
[16]
Rangaraju, H. G., Hedge, V., Raja, K. B. and Murulidhara K. N. Design of Efficient reversible Binary Comparator. In Proc. of the International Conference of Communication Technology System Design. (2011), Elsevier Procedia Engineering 30 (2012), 897--904. DOI=10.1016/j/proeng.2012.01.943.
[17]
Rangaraju, H. G., Hedge, V., Raja, K. B. and Murulidhara, K. N. Design and Optimization of n-bit Reversible Binary Comparator. International Journal of Computer Application. 55, 18( Oct, 2012).
[18]
Sasanian, Z. Realizing Reversible Circuits Using a New Class of Quantum Gates. In Proc. of the ACM DAC. (Sanfrancisco, California, USA, June 3-7, 2012).
[19]
Thapliyal, H., Bhatt, A. and Ranganathan, N. A New CRL Gate as Super Class of Fredkin Gate to Design Reversible Quantum Circuits. In Proc.of the 56th IEEE MWSCAS. ( Aug, 2013), 1067--1070. DOI= 10.1109/MWSCAS.2013.6674837.
[20]
Thapliyal, H. and Ranganathan, N. Design of Efficient Reversible Binary Subtractors Based on a New Reversible Gate. In Proc. of the ISVLSI. (Tampa, Florida, May 2009), 229--234.
[21]
Thapliyal, H., Ranganathan, N. and Ferreira, R. Design of a Comparator Tree Based on Reversible Logic. In Proc. of the 10th IEEE International Conference on Nanotechnology. (Aug 17-20, 2010).
[22]
Toffoli, T. 1980. Reversible Computing. Tech Memo MIT/CLS/TM-151, MIT Lab for Computer Science.
[23]
Yang, G., Hung, W. N. N., Song, X. and Perkowski, M. Majority based reversible logic gates. Elsevier Journal on Theoretical Computer Science. 334 (2005), 259--274.

Cited By

View all

Index Terms

  1. Reversible Comparator Circuit Using a New Reversible Gate

    Recommendations

    Comments

    Please enable JavaScript to view thecomments powered by Disqus.

    Information & Contributors

    Information

    Published In

    cover image ACM Other conferences
    ICCCT '15: Proceedings of the Sixth International Conference on Computer and Communication Technology 2015
    September 2015
    481 pages
    ISBN:9781450335522
    DOI:10.1145/2818567
    Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

    Publisher

    Association for Computing Machinery

    New York, NY, United States

    Publication History

    Published: 25 September 2015

    Permissions

    Request permissions for this article.

    Check for updates

    Author Tags

    1. Garbage Output
    2. Low Power Computing
    3. Quantum Computing
    4. Reversible Circuits
    5. Reversible Logic

    Qualifiers

    • Research-article
    • Research
    • Refereed limited

    Conference

    ICCCT '15

    Acceptance Rates

    Overall Acceptance Rate 33 of 124 submissions, 27%

    Contributors

    Other Metrics

    Bibliometrics & Citations

    Bibliometrics

    Article Metrics

    • Downloads (Last 12 months)6
    • Downloads (Last 6 weeks)2
    Reflects downloads up to 07 Mar 2025

    Other Metrics

    Citations

    Cited By

    View all

    View Options

    Login options

    View options

    PDF

    View or Download as a PDF file.

    PDF

    eReader

    View online with eReader.

    eReader

    Figures

    Tables

    Media

    Share

    Share

    Share this Publication link

    Share on social media