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Low power multiplication for FIR filters

Authors:

Chris J. Nicol,

Patrik LarssonAuthors Info & Claims

ISLPED '97: Proceedings of the 1997 international symposium on Low power electronics and design

Pages 76 - 79

https://doi.org/10.1145/263272.263287

Published: 01 August 1997 Publication History

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Cited By

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Kuang SWang J(2010)Design of power-efficient configurable booth multiplierIEEE Transactions on Circuits and Systems Part I: Regular Papers10.1109/TCSI.2009.202376357:3(568-580)Online publication date: 1-Mar-2010
https://dl.acm.org/doi/10.1109/TCSI.2009.2023763
LEE YJUNG HCHUNG K(2009)Low Power MAC Design with Variable Precision SupportIEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences10.1587/transfun.E92.A.1623E92-A:7(1623-1632)Online publication date: 2009
https://doi.org/10.1587/transfun.E92.A.1623
Katkar AStine JGarrett DLach JZukowski C(2004)Modified booth truncated multipliersProceedings of the 14th ACM Great Lakes symposium on VLSI10.1145/988952.989059(444-447)Online publication date: 26-Apr-2004
https://dl.acm.org/doi/10.1145/988952.989059
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Information

Published In

ISLPED '97: Proceedings of the 1997 international symposium on Low power electronics and design

August 1997

335 pages

ISBN:0897919033

DOI:10.1145/263272

Chairmen:
Brock Barton
Texas Instruments
,
Massoud Pedram
USC
,
Anantha Chandrakasan
Massachusettes Institute of Technology
,
Sayfe Kiaei
Oregon State Univ., Corvallis

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 01 August 1997

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ISLPED97: 1997 International Symposium on Low Power Electronics and Design

August 18 - 20, 1997

California, Monterey, USA

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Overall Acceptance Rate 398 of 1,159 submissions, 34%

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Cited By

View all

Kuang SWang J(2010)Design of power-efficient configurable booth multiplierIEEE Transactions on Circuits and Systems Part I: Regular Papers10.1109/TCSI.2009.202376357:3(568-580)Online publication date: 1-Mar-2010
https://dl.acm.org/doi/10.1109/TCSI.2009.2023763
LEE YJUNG HCHUNG K(2009)Low Power MAC Design with Variable Precision SupportIEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences10.1587/transfun.E92.A.1623E92-A:7(1623-1632)Online publication date: 2009
https://doi.org/10.1587/transfun.E92.A.1623
Katkar AStine JGarrett DLach JZukowski C(2004)Modified booth truncated multipliersProceedings of the 14th ACM Great Lakes symposium on VLSI10.1145/988952.989059(444-447)Online publication date: 26-Apr-2004
https://dl.acm.org/doi/10.1145/988952.989059
Cho KLee KChung JParhi K(2004)Design of low-error fixed-width modified booth multiplierIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2004.82585312:5(522-531)Online publication date: 1-May-2004
https://dl.acm.org/doi/10.1109/TVLSI.2004.825853
Margala MWang H(2004)New approach to design for reusability of arithmetic cores in systems-on-chipIntegration, the VLSI Journal10.1016/j.vlsi.2004.01.00438:2(185-203)Online publication date: 1-Dec-2004
https://dl.acm.org/doi/10.1016/j.vlsi.2004.01.004
Stine JDuverne O(2003)Variations on truncated multiplicationEuromicro Symposium on Digital System Design, 2003. Proceedings.10.1109/DSD.2003.1231908(112-119)Online publication date: 2003
https://doi.org/10.1109/DSD.2003.1231908
Cho KLee KChung JParhi K(2002)Low error fixed-width modified Booth multiplierIEEE Workshop on Signal Processing Systems10.1109/SIPS.2002.1049683(45-50)Online publication date: 2002
https://doi.org/10.1109/SIPS.2002.1049683
Zhan Yu (2002)Low power finite field multiplication and division in re-configurable Reed-Solomon codec2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353)10.1109/ISCAS.2002.1010821(V-785-V-788)Online publication date: 2002
https://doi.org/10.1109/ISCAS.2002.1010821
Huang ZErcegovac M(2002)Two-dimensional signal gating for low-power array multiplier design2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353)10.1109/ISCAS.2002.1009884(I-489-I-492)Online publication date: 2002
https://doi.org/10.1109/ISCAS.2002.1009884
Zhan Yu Meng-Lin Yu Azadet KWillson A(2002)A low power adaptive filter using dynamic reduced 2's-complement representationProceedings of the IEEE 2002 Custom Integrated Circuits Conference (Cat. No.02CH37285)10.1109/CICC.2002.1012784(141-144)Online publication date: 2002
https://doi.org/10.1109/CICC.2002.1012784
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