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Peak power reduction and workload balancing by space-time multiplexing based demand-supply matching for 3D thousand-core microprocessor

Authors:

P. D. Sai Manoj,

Hao YuAuthors Info & Claims

DAC '13: Proceedings of the 50th Annual Design Automation Conference

Article No.: 175, Pages 1 - 6

https://doi.org/10.1145/2463209.2488950

Published: 29 May 2013 Publication History

Abstract

Space-time multiplexing is utilized for demand-supply matching between many-core microprocessors and power converters. Adaptive clustering is developed to classify cores by similar power level in space and similar power behavior in time. In each power management cycle, minimum number of power converters are allocated for space-time multiplexed matching, which is physically enabled by 3D through-silicon-vias. Moreover, demand-response based task adjustment is applied to reduce peak power and to balance workload. The proposed power management system is verified by system models with physical design parameters and benched power traces, which show 38.10% peak power reduction and 2.60x balanced workload.

References

[1]

S. Vangal and et.al., "An 80-Tile 1.28TFLOPS network-on-chip in 65 nm CMOS," in IEEE ISSCC, 2007.

[2]

S. Bell and et.al., "TILE64#8482; processor: a 64-core SoC with mesh interconnect," in IEEE ISSCC, 2008.

[3]

M. Healy and et.al., "Design and analysis of 3D-MAPS: a many-core 3D processor with stacked memory," in IEEE CICC, 2010.

[4]

H. Yu, J. Ho, and L. He, "Allocating power ground vias in 3d ics for simultaneous power and thermal integrity," ACM TODAES, vol. 14, no. 3, 2011.

Digital Library

[5]

W. Kim and et.al., "System level analysis of fast, per-core DVFS using on-chip switching regulators," in IEEE HPCA, 2008.

[6]

R. Bondade and D. Ma, "Hardware-software codesign of an embedded multiple-supply power management unit for multicore SoCs using an adaptive global/local power allocation and processing scheme," ACM TODAES, vol. 16, no. 3, 2011.

Digital Library

[7]

J. Howard and et. al, "A 48--core ia-32 processor in 45 nm cmos using on-die message-passing and dvfs for performance and power scaling," IEEE JSSC, vol. 46, pp. 173--183, January 2011.

[8]

N. Sturcken and et.al., "A 2.5D integrated voltage regulator using coupled-magnetic-core inductors on silicon interposer delivering 10.8A/mm²," in IEEE ISSCC, 2012.

[9]

R. H. Katz and et. al, "An information-centric energy infrastructure: The berkley view," Sustainable Computing: Informatics and Systems, no. 1, pp. 7--22, March 2011.

[10]

"MIPS processor cores," http://www.mips.com/products/processor-cores/.

[11]

"SPEC 2000 CPU benchmark suits," http://www.spec.org/cpu/.

[12]

"Wattch version 1.02," http://www.eecs.harvard.edu/~dbrooks/wattch-form.html.

[13]

W. Kim and et.al., "A fully-integrated 3-level DC/DC converter for nanosecond-scale DVS with fast shunt regulation," in IEEE ISSCC, 2011.

[14]

V. der Plas and et.al., "Design issues and considerations for low-cost 3D TSV IC technology," in IEEE ISSCC, 2010.

[15]

G. Katti and et.al., "Electrical modeling and characterization of through silicon via for three-dimensional ICs," IEEE Trans. on Electron Devices, vol. 57, no. 1, pp. 256--262, 2010.

Cited By

Pagani SManoj PJantsch AHenkel J(2020)Machine Learning for Power, Energy, and Thermal Management on Multicore Processors: A SurveyIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2018.287816839:1(101-116)Online publication date: Jan-2020
https://doi.org/10.1109/TCAD.2018.2878168
Dhavlle APudukotai Dinakarrao S(2020)A Comprehensive Review of ML-based Time-Series and Signal Processing Techniques and their Hardware Implementations2020 11th International Green and Sustainable Computing Workshops (IGSC)10.1109/IGSC51522.2020.9291173(1-8)Online publication date: 19-Oct-2020
https://doi.org/10.1109/IGSC51522.2020.9291173
Ng JWang XSingh AMak T(2016)Defragmentation for Efficient Runtime Resource Management in NoC-Based Many-Core SystemsIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2016.254856424:11(3359-3372)Online publication date: 1-Nov-2016
https://dl.acm.org/doi/10.1109/TVLSI.2016.2548564
Show More Cited By

Index Terms

Peak power reduction and workload balancing by space-time multiplexing based demand-supply matching for 3D thousand-core microprocessor
1. Hardware
  1. Electronic design automation
    1. Physical design (EDA)

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cover image ACM Conferences

DAC '13: Proceedings of the 50th Annual Design Automation Conference

May 2013

1285 pages

ISBN:9781450320719

DOI:10.1145/2463209

Copyright © 2013 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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EDAC: Electronic Design Automation Consortium
SIGDA: ACM Special Interest Group on Design Automation
IEEE-CEDA

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SIGBED: ACM Special Interest Group on Embedded Systems

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 29 May 2013

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DAC '13: The 50th Annual Design Automation Conference 2013

May 29 - June 7, 2013

Texas, Austin

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Overall Acceptance Rate 1,770 of 5,499 submissions, 32%

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Cited By

Pagani SManoj PJantsch AHenkel J(2020)Machine Learning for Power, Energy, and Thermal Management on Multicore Processors: A SurveyIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2018.287816839:1(101-116)Online publication date: Jan-2020
https://doi.org/10.1109/TCAD.2018.2878168
Dhavlle APudukotai Dinakarrao S(2020)A Comprehensive Review of ML-based Time-Series and Signal Processing Techniques and their Hardware Implementations2020 11th International Green and Sustainable Computing Workshops (IGSC)10.1109/IGSC51522.2020.9291173(1-8)Online publication date: 19-Oct-2020
https://doi.org/10.1109/IGSC51522.2020.9291173
Ng JWang XSingh AMak T(2016)Defragmentation for Efficient Runtime Resource Management in NoC-Based Many-Core SystemsIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2016.254856424:11(3359-3372)Online publication date: 1-Nov-2016
https://dl.acm.org/doi/10.1109/TVLSI.2016.2548564
Gerards MHurink JHölzenspies P(2016)A survey of offline algorithms for energy minimization under deadline constraintsJournal of Scheduling10.1007/s10951-015-0463-819:1(3-19)Online publication date: 1-Feb-2016
https://dl.acm.org/doi/10.1007/s10951-015-0463-8
Wang XZhao BMak TYang MJiang YDaneshtalab M(2015)An efficient runtime power allocation scheme for many-core systems inspired from auction theoryIntegration, the VLSI Journal10.1016/j.vlsi.2014.11.00150:C(147-157)Online publication date: 1-Jun-2015
https://dl.acm.org/doi/10.1016/j.vlsi.2014.11.001

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