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Coloring register pairs

Published: 01 March 1992 Publication History

Abstract

Many architectures require that a program use pairs of adjacent registers to hold double-precision floating-point values. Register allocators based on Chaitin's graph-coloring technique have trouble with programs that contain both single-register values and values that require adjacent pairs of registers. In particular, Chaitin's algorithm often produces excessive spilling on such programs. This results in underuse of the register set; the extra loads and stores inserted into the program for spilling also slow execution.
An allocator based on an optimistic coloring scheme naturally avoids this problem. Such allocators delay the decision to spill a value until late in the allocation process. This eliminates the over-spilling provoked by adjacent register pairs in Chaitin's scheme.
This paper discusses the representation of register pairs in a graph coloring allocator. It explains the problems that arise with Chaitin's allocator and shows how the optimistic allocator avoids them. It provides a rationale for determining how to add larger aggregates to the interference graph.

References

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BERNSTEIN, D., GOLDIN, D. Q., GOLUMBIC, M. C., KRAWCZYK, H., MANSOUR, Y., NAHSHON, I., AND PINTER, R.Y. Spill code minimization techniques for optimizing compilers. In Proceedings of the ACM SIGPLAN '89 Conference on Programming Language Design and Implementation. SIGPLAN Not. 24, 7 (July 1989), 258-263.]]
[2]
BRIGGS, P., COOPER, K. D., KENNEDY, K., AND TORCZON, L. Coloring heuristics for register allocation. In Proceedings of the ACM SIGPLAN '89 Conference on Programming Language Design and Implementation. SIGPLAN Not. 24, 7 (July 1989), 275-284.]]
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CHAITIN, G. J. Register allocation and spilling via graph coloring. In Proceedings of the ACM SIGPLAN '82 Symposium on Compiler Construction. SIGPLAN Not. 17, 6 (June 1982), 98-105.]]
[4]
CHAITIN, G. J., AUSLANDER, M. A., CHANDRA, A. K., COCKE, J., HOPKINS, M. E., AND MARKSTEIN, P.W. Register allocation via coloring. Comput. Lang. 6, (Jan. 1981), 47-57.]]
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CHOW, F. C., AND HENNESSY, J. L. Register allocation by priority-based coloring. In Proceedings of the A CM SIGPLAN '84 Symposium on Compiler Construction. SIGPLAN Not. 19, 6 (June 1984), 222-232.]]
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CHOW, F. C., AND HENNESSY, J.L. The priority-based coloring approach to register allocation. ACM Trans. Program. Lang. Syst. 12, 4 (Oct. 1990), 501-536.]]
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FABRI, J. Automatic storage optimization. In Proceedings of the A CM SIGPLAN '79 Symposium on Compiler Construction. SIGPLAN Not. 14, 8 (Aug. 1979), 83-91.]]
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FABRI, J. Automatic Storage Optimization. UMI Research Press, Ann Arbor, Mich., 1982.]]
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GOLUMBIC, M.C. Algorithmic Graph Theory and Perfect Graphs. Academic Press, 1980.]]
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HOPKINS, M.E. Compiling for the RT PC ROMP. In IBM RT Personal Computer Technology. IBM, 1986, 76-82.]]
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INTEL CORPORATION. i860TM XP Microprocessor, 1991.]]
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NICKERSON, B. R. Graph coloring register allocation for processors with multi-register operands. In Proceedings of the ACM SIGPLAN '90 Conference on Programming Language Design and Implementation. SIGPLAN Not. 25, 6 (June 1990), 40-52.]]
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SETHI, R.Complete register allocation problems. SIAM J. Comput. 4, 3 (Sept. 1975), 226-248.]]

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Martin Joseph Jourdan

Register allocation is one of the tasks of a compiler back end that is crucial for producing efficient code. One of the best-performing register allocation algorithms up to now was developed by Chaitin and colleagues and is based on graph coloring. That algorithm behaves badly on machines with operations requiring that their operands be placed in adjacent register pairs, however. In such cases, it overestimates the need for spilling, because it invokes spilling as soon as the interference graph might be non-colorable (pessimistic behavior); as the authors show, requiring register pairs creates many more opportunities for this. This research paper proposes a better alternative. It is based on a variation of Chaitin's algorithm, devised by the same authors, in which spilling is handled optimistically by leaving the decision to the phase that determines the coloring; hence, spilling is invoked only when the coloring actually fails. On this basis, the authors present a way to construct the interference graph to handle register pairs, and they use examples to show that their method performs better than Chaitin's. The paper is well written and easy to understand. Since the problem it contributes to solving is important, reading it is worthwhile for everybody interested or involved in compiler construction. This paper is a perfect example of the kind of works LOPLAS seeks to publish: concise, clear, interesting, and immediately applicable.

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Published In

cover image ACM Letters on Programming Languages and Systems
ACM Letters on Programming Languages and Systems  Volume 1, Issue 1
March 1992
103 pages
ISSN:1057-4514
EISSN:1557-7384
DOI:10.1145/130616
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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 01 March 1992
Published in LOPLAS Volume 1, Issue 1

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  1. graph coloring
  2. register allocation

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