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Optimizing memory transactions

Published: 11 June 2006 Publication History

Abstract

Atomic blocks allow programmers to delimit sections of code as 'atomic', leaving the language's implementation to enforce atomicity. Existing work has shown how to implement atomic blocks over word-based transactional memory that provides scalable multi-processor performance without requiring changes to the basic structure of objects in the heap. However, these implementations perform poorly because they interpose on all accesses to shared memory in the atomic block, redirecting updates to a thread-private log which must be searched by reads in the block and later reconciled with the heap when leaving the block.This paper takes a four-pronged approach to improving performance: (1) we introduce a new 'direct access' implementation that avoids searching thread-private logs, (2) we develop compiler optimizations to reduce the amount of logging (e.g. when a thread accesses the same data repeatedly in an atomic block), (3) we use runtime filtering to detect duplicate log entries that are missed statically, and (4) we present a series of GC-time techniques to compact the logs generated by long-running atomic blocks.Our implementation supports short-running scalable concurrent benchmarks with less than 50\% overhead over a non-thread-safe baseline. We support long atomic blocks containing millions of shared memory accesses with a 2.5-4.5x slowdown.

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Published In

cover image ACM Conferences
PLDI '06: Proceedings of the 27th ACM SIGPLAN Conference on Programming Language Design and Implementation
June 2006
438 pages
ISBN:1595933204
DOI:10.1145/1133981
  • cover image ACM SIGPLAN Notices
    ACM SIGPLAN Notices  Volume 41, Issue 6
    Proceedings of the 2006 PLDI Conference
    June 2006
    426 pages
    ISSN:0362-1340
    EISSN:1558-1160
    DOI:10.1145/1133255
    Issue’s Table of Contents
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Published: 11 June 2006

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  1. atomicity
  2. critical regions
  3. transactional memory

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  • (2023)Safety Hints for HTM Capacity Abort Mitigation2023 IEEE International Symposium on High-Performance Computer Architecture (HPCA)10.1109/HPCA56546.2023.10071113(206-219)Online publication date: Feb-2023
  • (2022)Software Transactional MemoryTransactional Memory10.1007/978-3-031-01719-3_3(53-130)Online publication date: 17-Oct-2022
  • (2022)Programming Transactional MemoryTransactional Memory10.1007/978-3-031-01719-3_2(15-52)Online publication date: 17-Oct-2022
  • (2020)Transactional Memory: A Review2020 6th International Conference on Advanced Computing and Communication Systems (ICACCS)10.1109/ICACCS48705.2020.9074423(370-375)Online publication date: Mar-2020
  • (2019)Dynamic one-to-one mapping of ownership records for STM using versioned weak referencesProceedings of the 16th ACM SIGPLAN International Conference on Managed Programming Languages and Runtimes10.1145/3357390.3361020(37-49)Online publication date: 21-Oct-2019
  • (2019)Simplifying Transactional Memory Support in C++ACM Transactions on Architecture and Code Optimization10.1145/332879616:3(1-24)Online publication date: 25-Jul-2019
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