Article

Free access

On improving fault diagnosis for synchronous sequential circuits

Authors:

Irith Pomeranz,

Sudhakar M. ReddyAuthors Info & Claims

DAC '94: Proceedings of the 31st annual Design Automation Conference

Pages 504 - 509

https://doi.org/10.1145/196244.196517

Published: 06 June 1994 Publication History

PDF eReader

References

[1]

E.J. McCluskey, "Test and Diagnosis Procedure for Digital Networks", Computer, Jan. 1971, pp. 17-20.

Google Scholar

[2]

M. Abramovici and M. A. Breuer, "Multiple Fault Diagnosis in Combinational Circuits Based on Effect-Cause Analysis", IEEE Trans. on Computers, June 1980, pp. 451-460.

Google Scholar

[3]

R.E. Tulloss, "Fault Dictionary Compression: Recognizing when a Fault May Be Unambiguously Represented by a Single Failure Detection", 1980 Test Conf., Nov. 1980, pp. 368-370.

Google Scholar

[4]

J. Savir and J. P. Roth, "Testing for, and Distinguishing between Failures", 12th Intl. Syrup. on Fault-Tolerant Computing, June 1982, pp. 165-172.

Google Scholar

[5]

J. Richman and K. R. Bowden, "The Modern Fault Dictionary", 1985 Intl. Test Conf., Sept. 1985, pp. 696-702.

Google Scholar

[6]

H. Cox and J. Rajski, "A Method of Fault Analysis for Test Generation and Fault Diagnosis", IEEE Transactions on CAD, July 1988.

Google Scholar

[7]

J.A. Waicukauski and E. Lindbloom, "Failure Diagnosis of Structured VLSI", IEEE Design and Test of Computers, Aug. 1989, pp. 49-60.

Digital Library

Google Scholar

[8]

P. Camurati, A. Lioy, P. Prinetto and M. Sonza Reorda, "Diagnosis Oriented Test Pattern Generation", European Design Autom. Conf., March 1990, pp. 470-474.

Digital Library

Google Scholar

[9]

S.D. Millman, E. J. McCluskey and J. M. Acken, "Diagnosing CMOS Bridging Faults with Stuck-at Fault Dictionaries", 1990 Intl. Test Conf., Sept. 1990, pp. 860-870.

Google Scholar

[10]

K. Kubiak, S. Parkes, W. K. Fuchs and R. Saleh, "Exact Evaluation of Diagnostic Test Resolution", 29th Design Autom. Conf, June 1992, pp. 347-352.

Digital Library

Google Scholar

[11]

E.M. Rudnick, W. K. Fuchs and J. H. Patel, "Diagnostic Fault Simulation of Sequential Circuits", Intl. Test Conf., 1992, pp. 178-186.

Digital Library

Google Scholar

[12]

I. Pomeranz and S.M. Reddy, "Test Generation for Synchronous Sequential Circuits Using Multiple Observation Times", 21st Fault-Tolerant Comput. Symp. June 1991, pp. 52-59, also in I. Pomeranz and S.M. Reddy, "The Multiple Observation Time Test Strategy", IEEE Trans. on Computers, May 1992, pp. 627-637.

Digital Library

Google Scholar

[13]

I. Pomeranz and S. M. Reddy, "Applications of Homing Sequences for Synchronous Sequential Circuits", to appear in the IEEE Trans. on Computers, also available as Technical Report No. 4-7-1992, Dept. of Electrical and Computer Eng., U. of Iowa.

Digital Library

Google Scholar

[14]

I. Pomeranz and S.M. Reddy, "Classification of Faults in Synchronous Sequential Circuits", to appear in the IEEE Trans. on Computers, also available as Technical Report No. 3-27-1991, Electrical and Computer Engineering Department, University of Iowa.

Digital Library

Google Scholar

[15]

M. Abramovici, M.A. Breuer and A.D. Friedman, Digital Systems Testing and Testable Design, Computer Science Press, 1990.

Google Scholar

[16]

I. Pomeranz and S.M. Reddy, "Fault Simulation for Synchronous Sequential Circuits Under the Multiple Observation Time Testing Approach", 1993 European Test Conf., pp. 292-300.

Google Scholar

Cited By

View all

Pomeranz IReddy S(2006)A diagnostic test generation procedure based on test elimination by vector omission for synchronous sequential circuitsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/43.84508319:5(589-600)Online publication date: 1-Nov-2006
https://dl.acm.org/doi/10.1109/43.845083
Enamul Amyeen MPomeranz IKent Fuchs W(2002)Theorems for efficient identification of indistinguishable fault pairs in synchronous sequential circuitsProceedings 20th IEEE VLSI Test Symposium (VTS 2002)10.1109/VTS.2002.1011136(181-186)Online publication date: 2002
https://doi.org/10.1109/VTS.2002.1011136
Pomeranz IReddy S(2000)On synchronizing sequences and unspecified values in output responses of synchronous sequential circuitsVLSI Design 2000. Wireless and Digital Imaging in the Millennium. Proceedings of 13th International Conference on VLSI Design10.1109/ICVD.2000.812639(392-397)Online publication date: 2000
https://doi.org/10.1109/ICVD.2000.812639
Show More Cited By

Index Terms

On improving fault diagnosis for synchronous sequential circuits
1. Hardware
  1. Hardware test
    1. Test-pattern generation and fault simulation
  2. Integrated circuits
    1. Logic circuits
      1. Sequential circuits
2. Mathematics of computing
  1. Discrete mathematics
    1. Graph theory
      1. Trees

Recommendations

Transition fault testing for sequential circuits

Addresses the problem of simulating and generating tests for transition faults in nonscan and partial scan synchronous sequential circuits. A transition fault model for sequential circuits is first proposed. In this fault model, a transition fault is ...
Online Inverter Open-circuit Fault Diagnosis for Fault Tolerant Permanent Magnet Synchronous Motor System under multi-fault condition
2019 22nd International Conference on Electrical Machines and Systems (ICEMS)
The on-line inverter open-circuit fault diagnosis method of the six-phase fault tolerant permanent magnet synchronous motor (FTPMSM) system is investigated in this paper. The fault characteristic model of the FTPMSM system is first established, in which ...
A Survey on Fault Diagnosis and Fault Tolerant Methodologies for Permanent Magnet Synchronous Machines
Abstract
This paper presents a comprehensive survey of fault diagnosis and fault tolerant approaches for permanent magnet synchronous machines (PMSM). PMSMs are prominent in the pervading usage of electric motors, for their high efficiency, great ...

Comments

Please enable JavaScript to view thecomments powered by Disqus.

Information & Contributors

Information

Published In

DAC '94: Proceedings of the 31st annual Design Automation Conference

June 1994

739 pages

ISBN:0897916530

DOI:10.1145/196244

Chairman:
Michael Lorenzetti
Mentor Graphics Corp., Wilsonville, OR

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

Publisher

Association for Computing Machinery

New York, NY, United States

Publication History

Published: 06 June 1994

Permissions

Request permissions for this article.

Request Permissions

Check for updates

Qualifiers

Article

Conference

DAC94

Sponsor:

EDAC
SIGDA
IEEE-CAS

DAC94: The 31st ACM/IEEE-CAS/EDAC Design Automation Conference

June 6 - 10, 1994

California, San Diego, USA

Acceptance Rates

DAC '94 Paper Acceptance Rate 100 of 260 submissions, 38%;

Overall Acceptance Rate 1,770 of 5,499 submissions, 32%

Upcoming Conference

DAC '25

Sponsor:
sigda

62nd ACM/IEEE Design Automation Conference

June 22 - 26, 2025

San Francisco , CA , USA

Contributors

Other Metrics

View Article Metrics

Bibliometrics & Citations

Bibliometrics

Article Metrics

11
Total Citations
View Citations
77
Total Downloads

Downloads (Last 12 months)20
Downloads (Last 6 weeks)2

Reflects downloads up to 21 Dec 2024

Other Metrics

View Author Metrics

Citations

Cited By

View all

Pomeranz IReddy S(2006)A diagnostic test generation procedure based on test elimination by vector omission for synchronous sequential circuitsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/43.84508319:5(589-600)Online publication date: 1-Nov-2006
https://dl.acm.org/doi/10.1109/43.845083
Enamul Amyeen MPomeranz IKent Fuchs W(2002)Theorems for efficient identification of indistinguishable fault pairs in synchronous sequential circuitsProceedings 20th IEEE VLSI Test Symposium (VTS 2002)10.1109/VTS.2002.1011136(181-186)Online publication date: 2002
https://doi.org/10.1109/VTS.2002.1011136
Pomeranz IReddy S(2000)On synchronizing sequences and unspecified values in output responses of synchronous sequential circuitsVLSI Design 2000. Wireless and Digital Imaging in the Millennium. Proceedings of 13th International Conference on VLSI Design10.1109/ICVD.2000.812639(392-397)Online publication date: 2000
https://doi.org/10.1109/ICVD.2000.812639
Pomeranz IReddy S(1998)A diagnostic test generation procedure for synchronous sequential circuits based on test eliminationProceedings of the 1998 IEEE International Test Conference10.5555/648020.745763(1074-1083)Online publication date: 18-Oct-1998
https://dl.acm.org/doi/10.5555/648020.745763
Boppana VFuchs WYasuura H(1998)Dynamic fault collapsing and diagnostic test pattern generation for sequential circuitsProceedings of the 1998 IEEE/ACM international conference on Computer-aided design10.1145/288548.288593(147-154)Online publication date: 1-Nov-1998
https://dl.acm.org/doi/10.1145/288548.288593
Pomeranz IReddy S(1998)A diagnostic test generation procedure for synchronous sequential circuits based on test eliminationProceedings International Test Conference 1998 (IEEE Cat. No.98CH36270)10.1109/TEST.1998.743306(1074-1083)Online publication date: 1998
https://doi.org/10.1109/TEST.1998.743306
Hartanto IBoppana VPatel JFuchs Wcom h(1997)Diagnostic Test Pattern Generation for Sequential CircuitsProceedings of the 15th IEEE VLSI Test Symposium10.5555/832297.836341Online publication date: 27-Apr-1997
https://dl.acm.org/doi/10.5555/832297.836341
Boppana VHartanto IFuchs W(1997)Characterization and Implicit Identification of Sequential IndistinguishabilityProceedings of the Tenth International Conference on VLSI Design: VLSI in Multimedia Applications10.5555/523974.834912Online publication date: 4-Jan-1997
https://dl.acm.org/doi/10.5555/523974.834912
Hartanto IBoppana VPatel JFuchs W(1997)Diagnostic test pattern generation for sequential circuitsProceedings. 15th IEEE VLSI Test Symposium (Cat. No.97TB100125)10.1109/VTEST.1997.600264(196-202)Online publication date: 1997
https://doi.org/10.1109/VTEST.1997.600264
Boppana VHartanto IFuchs W(1997)Characterization and implicit identification of sequential indistinguishabilityProceedings Tenth International Conference on VLSI Design10.1109/ICVD.1997.568156(376-380)Online publication date: 1997
https://doi.org/10.1109/ICVD.1997.568156
Show More Cited By

View Options

View options

PDF

View or Download as a PDF file.

PDF

eReader

View online with eReader.

eReader

Login options

Check if you have access through your login credentials or your institution to get full access on this article.

Cited By

Index Terms

Recommendations

Transition fault testing for sequential circuits

Online Inverter Open-circuit Fault Diagnosis for Fault Tolerant Permanent Magnet Synchronous Motor System under multi-fault condition

A Survey on Fault Diagnosis and Fault Tolerant Methodologies for Permanent Magnet Synchronous Machines