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Accurately evaluating application performance in simulated hybrid multi-tasking systems

Published: 21 February 2010 Publication History

Abstract

Evaluating the performance of reconfigurable computing applications in multi-tasking systems using simulation (as can be needed in early design-space exploration) faces several challenges. The complexity of full-system, cycle-accurate simulation prevents executing applications of any appreciable size to completion. One must sample only a portion of execution; yet unless care is taken, the measured performance for the sampled interval will not be indicative of the complete execution. Although this is generally a problem for simulation-based evaluation, the problem is exacerbated for multi-tasking systems. This paper therefore presents work to develop a performance evaluation methodology that accurately measures hybrid (both hardware and software) application performance, accounts for additional overhead introduced by hybrid resource management (such as run-time allocation of reconfigurable hardware), and correctly compensates for momentary imbalances in processor time allocation that are only artifacts of the (necessarily) short simulated execution timespan and would balance out over time.

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Cited By

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  • (2014)A reconfigurable processor architecture combining multi-core and reconfigurable processing unitsTelecommunications Systems10.1007/s11235-013-9791-155:3(333-344)Online publication date: 1-Mar-2014
  • (2012)Enhancing Cache Coherent Architectures with access patterns for embedded manycore systems2012 International Symposium on System on Chip (SoC)10.1109/ISSoC.2012.6376369(1-7)Online publication date: Oct-2012
  • (2011)A scalable memory interface for multicore reconfigurable computing systems2011 International Conference on Field-Programmable Technology10.1109/FPT.2011.6132685(1-8)Online publication date: Dec-2011

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cover image ACM Conferences
FPGA '10: Proceedings of the 18th annual ACM/SIGDA international symposium on Field programmable gate arrays
February 2010
308 pages
ISBN:9781605589114
DOI:10.1145/1723112
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Publication History

Published: 21 February 2010

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Author Tags

  1. full system simulation
  2. heterogeneous systems
  3. hybrid systems
  4. multi-tasking systems
  5. performance evaluation

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Cited By

View all
  • (2014)A reconfigurable processor architecture combining multi-core and reconfigurable processing unitsTelecommunications Systems10.1007/s11235-013-9791-155:3(333-344)Online publication date: 1-Mar-2014
  • (2012)Enhancing Cache Coherent Architectures with access patterns for embedded manycore systems2012 International Symposium on System on Chip (SoC)10.1109/ISSoC.2012.6376369(1-7)Online publication date: Oct-2012
  • (2011)A scalable memory interface for multicore reconfigurable computing systems2011 International Conference on Field-Programmable Technology10.1109/FPT.2011.6132685(1-8)Online publication date: Dec-2011

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