research-article

Analog Testing with Time Response Parameters

Authors:

Ashok Balivada,

Jin Chen,

Jacob A. AbrahamAuthors Info & Claims

IEEE Design & Test, Volume 13, Issue 2

Pages 18 - 25

https://doi.org/10.1109/54.500197

Published: 01 June 1996 Publication History

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Abstract

Testing Linear Analog Circuits using Time-Domain Response Parameters Diverse design styles and a multitude of response parameters makes analog circuit testing a difficult and expensive process. Currently, these circuits are tested for their functionality, which in the case of linear analog circuits may take the form of verifying among other functions, the frequency response over the specified range of frequencies, and the step response. Fault oriented testing strives to lower this complexity by testing only for the presence of the most probable defects using a small set of highly efficient tests. In this article, we present a simple test generation technique to derive sinusoidal test waveforms which facilitate detection of a large class of faults from the amplitude and phase error (from the good values) of the steady state time response waveform. In addition, we also demonstrate the suitability of saturated ramp waveforms as tests and the use of associated ramp response parameters like delay, rise-time, and overshoot as criteria for detecting faulty behavior. We show that all these parameters can be computed using simple algorithms from closed form expressions of the sinusoidal and ramp response. We demonstrate our strategy using an example and discuss future directions.

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Cited By

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Shi CLee SAguilar SSánchez-Sinencio E(2018)A Time-Domain Digital-Intensive Built-In Tester for Analog CircuitsJournal of Electronic Testing: Theory and Applications10.1007/s10836-018-5713-134:3(313-320)Online publication date: 1-Jun-2018
https://dl.acm.org/doi/10.1007/s10836-018-5713-1
Yan LWang HLiu ZZhou JLong B(2017)A Novel Noise-assisted Prognostic Method for Linear Analog CircuitsJournal of Electronic Testing: Theory and Applications10.1007/s10836-017-5688-333:5(559-572)Online publication date: 1-Oct-2017
https://dl.acm.org/doi/10.1007/s10836-017-5688-3
Rutkowski JGrzechca D(2008)Use of artificial intelligence techniques to fault diagnosis in analog systemsProceedings of the 2nd conference on European computing conference10.5555/1562423.1562471(267-274)Online publication date: 11-Sep-2008
https://dl.acm.org/doi/10.5555/1562423.1562471
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Analog Testing with Time Response Parameters
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Published In

IEEE Design & Test Volume 13, Issue 2

June 1996

83 pages

ISSN:0740-7475

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IEEE Computer Society Press

Washington, DC, United States

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Published: 01 June 1996

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Shi CLee SAguilar SSánchez-Sinencio E(2018)A Time-Domain Digital-Intensive Built-In Tester for Analog CircuitsJournal of Electronic Testing: Theory and Applications10.1007/s10836-018-5713-134:3(313-320)Online publication date: 1-Jun-2018
Yan LWang HLiu ZZhou JLong B(2017)A Novel Noise-assisted Prognostic Method for Linear Analog CircuitsJournal of Electronic Testing: Theory and Applications10.1007/s10836-017-5688-333:5(559-572)Online publication date: 1-Oct-2017
Rutkowski JGrzechca D(2008)Use of artificial intelligence techniques to fault diagnosis in analog systemsProceedings of the 2nd conference on European computing conference10.5555/1562423.1562471(267-274)Online publication date: 11-Sep-2008
Wang (2007)System-on-Chip Test ArchitecturesundefinedOnline publication date: 20-Nov-2007
Dumas NAzaïs FLatorre LNouet P(2006)Electro-thermal Stimuli for MEMS Testing in FSBM TechnologyJournal of Electronic Testing: Theory and Applications10.1007/s10836-005-6132-722:2(189-198)Online publication date: 1-Apr-2006
Bhattacharya SChatterjee A(2005)Optimized wafer-probe and assembled package test design for analog circuitsACM Transactions on Design Automation of Electronic Systems10.1145/1059876.105988210:2(303-329)Online publication date: 1-Apr-2005
Shin HYu HAbraham JGarrett DLach JZukowski C(2004)LFSR-based BIST for analog circuits using slope detectionProceedings of the 14th ACM Great Lakes symposium on VLSI10.1145/988952.989029(316-321)Online publication date: 26-Apr-2004
Pous CColomer JMelendez Jde la Rosa J(2003)Case base management for analog circuits diagnosis improvementProceedings of the 5th international conference on Case-based reasoning: Research and Development10.5555/1760422.1760458(437-451)Online publication date: 23-Jun-2003
Ozev SOrailoglu A(2003)Automated System-Level Test Development for Mixed-Signal CircuitsAnalog Integrated Circuits and Signal Processing10.1023/A:102413061685135:2-3(169-178)Online publication date: 1-May-2003
Soma MHuynh SZhang JKim SDevarayanadurg G(2001)Hierarchical ATPG for Analog Circuits and SystemsIEEE Design & Test10.1109/54.90282418:1(72-81)Online publication date: 1-Jan-2001
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Current-Based Testing for Analog and Mixed-Signal Circuits

Intrinsic response for analog module testing using an analog testability bus

Fanout fault analysis for digital logic circuits

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