Developing Micropipeline Wavefront Arbiters
Abstract
The author based asynchronous circuit realizations of symmetric crossbar arbiters on the paradigm of intercepting moving wavefronts in a two-dimensional micropipeline-like structure. The LockC component, a hybrid of a Muller C element and a Q flop, supports both the movement of wavefronts in the array and the ability to intercept wavefronts asynchronously. These arbiters may find use in multiprocessor routing networks whose characteristics better match the capabilities of asynchronous circuits.
References
[1]
1. K.L. McMillian, Symbolic Model Checking, Kluwer Academic Press, Boston, 1993.
[2]
1. L.N. Bhuyan, "Analysis of Interconnection Networks with Different Arbiter Designs," J. Parallel and Distributed Computing, Vol. 4, 1987, pp. 384-403.
[3]
2. Y. Tamir and H.-C. Chi, "Symmetric Crossbar Arbitration," IEEE Trans. Parallel and Distributed Systems, Vol. 4, No. 1, Jan. 1993, pp. 13-27.
[4]
3. W. Coates, A. Davis, and K. Stevens, "The Post-Office Experience: Designing a Large Asynchronous Chip," Integration, Vol. 15, No. 3, Oct. 1993, pp. 341-366.
[5]
4. C. L. Seitz and W.-K. Su, "A Family of Routing and Communication Chips Based on the Mosaic," Proc. Research on Integrated Systems , G. Borriello and C. Ebeling, eds., MIT Press, Cambridge, Mass., 1993, pp. 320-327.
[6]
5. I. Sutherland, "Micropipelines," Comm. ACM, Vol. 32, No. 6, June 1989, pp. 720-738.
[7]
6. A.J. McAuley, "Dynamic Asynchronous Logic for High-Speed CMOS Systems," IEEE J. Solid State Circuits, Vol. 27, No. 3, Mar. 1992, pp. 382-388.
[8]
7. A.J. Martin, "Programming in VLSI: From Communicating Processes to Delay-Insensitive Circuits," UT Year of Programming Institute on Concurrent Programming, C.A.R. Hoare, ed., Addison-Wesley, Reading, Mass., 1989.
[9]
8. C.A. Mead and L. Conway, An Introduction to VLSI Systems: System Timing, Addison-Wesley, 1980.
[10]
9. E. Brunvand, "Parts-R-Us, a Chip Aparts," Tech. Report CMU-CS87-119, Carnegie Mellon University, Computer Science Dept., Pittsburgh, May 1987.
[11]
10. A. Liebchen and G. Gopalakrishnan, "Dynamic Reordering of High Latency Transactions in Time-Warp Simulation Using a Modified Micropipeline," Proc. Int'l Conf. Computer Design (ICCD), IEEE Computer Society Press, Los Alamitos, Calif., 1992, pp. 336-340.
[12]
11. F.U. Rosenberger et al., "Q-Modules: Internally Clocked Delay-Insensitive Modules," IEEE Trans. Computers, Vol. 37, No. 9, Sept. 1988, pp. 1,005-1,018.
[13]
12. A. El-Amawy, "Clocking Arbitrarily Large Computing Structures Under Constant Skew Bound," IEEE Trans. Parallel and Distributed Systems, Vol. 4, No. 3, Mar. 1993, pp. 241-255.
[14]
13. S.Y. Kung et al., "Wavefront Array Processor--Concept to Implementation," Computer , Vol. 20, No. 7, July 1987, pp. 18-35.
[15]
14. J.L. Peterson, Petri-Net Theory and The Modekng Of Systems, Prentice-Hall, New York, 1981.
[16]
15. A. Martin, "Distributed Mutual Exclusion on a Ring of Processes," Science of Computer Programming, Vol. 5, 1985, pp. 265-276.
[17]
16. T.E. Anderson et al., "High-Speed Switch Scheduling for Local-Area Networks," ACM Trans. Computer Systems, Vol. 11, No. 4, 1993, pp. 319-352.
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Published: 01 October 1994
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