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research-article

Technology mapping for TLU FPGAs based on decomposition of binary decision diagrams

Published: 01 November 2006 Publication History

Abstract

This paper proposes an efficient algorithm for technology mapping targeting table look-up (TLU) blocks. It is capable of minimizing either the number of TLUs used or the depth of the produced circuit. Our approach consists of two steps. First a network of super nodes, is created. Next a Boolean function of each super node with an appropriate don't care set is decomposed into a network of TLUs. To minimize the circuit's depth, several rules are applied on the critical portion of the mapped circuit

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cover image IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems  Volume 15, Issue 10
November 2006
125 pages

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IEEE Press

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Published: 01 November 2006

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  • (2017)LUT based realization of fixed-point multipliers targeting state-of-art FPGAsDesign Automation for Embedded Systems10.1007/s10617-017-9184-x21:2(89-115)Online publication date: 1-Jun-2017
  • (2012)New & improved models for SAT-based bi-decompositionProceedings of the great lakes symposium on VLSI10.1145/2206781.2206817(141-146)Online publication date: 3-May-2012
  • (2004)DAOmapProceedings of the 2004 IEEE/ACM International conference on Computer-aided design10.1109/ICCAD.2004.1382677(752-759)Online publication date: 7-Nov-2004
  • (2004)General decomposition of incompletely specified sequential machines with multi-state behavior realizationJournal of Systems Architecture: the EUROMICRO Journal10.1016/j.sysarc.2003.11.00250:8(445-492)Online publication date: 1-Aug-2004
  • (2003)A BDD-based fast heuristic algorithm for disjoint decompositionProceedings of the 2003 Asia and South Pacific Design Automation Conference10.1145/1119772.1119810(191-196)Online publication date: 21-Jan-2003
  • (2002)Reconfigurable computingACM Computing Surveys10.1145/508352.50835334:2(171-210)Online publication date: 1-Jun-2002
  • (2000)BDSProceedings of the 37th Annual Design Automation Conference10.1145/337292.337323(92-97)Online publication date: 1-Jun-2000

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