research-article

An industrially effective environment for formal hardware verification

Authors:

D. SymeAuthors Info & Claims

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Volume 24, Issue 9

Pages 1381 - 1405

https://doi.org/10.1109/TCAD.2005.850814

Published: 01 November 2006 Publication History

Abstract

The Forte formal verification environment for datapath-dominated hardware is described. Forte has proven to be effective in large-scale industrial trials and combines an efficient linear-time logic model-checking algorithm, namely the symbolic trajectory evaluation (STE), with lightweight theorem proving in higher-order logic. These are tightly integrated in a general-purpose functional programming language, which both allows the system to be easily customized and at the same time serves as a specification language. The design philosophy behind Forte is presented and the elements of the verification methodology that make it effective in practice are also described.

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Syme D(2020)The early history of F#Proceedings of the ACM on Programming Languages10.1145/33863254:HOPL(1-58)Online publication date: 12-Jun-2020
https://dl.acm.org/doi/10.1145/3386325
Chakraborty SKhasidashvili ZSeger CGajavelly RHaldankar TChhatani DMistry R(2017)Symbolic trajectory evaluation for word-level verificationFormal Methods in System Design10.1007/s10703-017-0268-950:2-3(317-352)Online publication date: 1-Jun-2017
https://dl.acm.org/doi/10.1007/s10703-017-0268-9
Bingham JKaivola RWahl T(2015)Universal boolean functional vectorsProceedings of the 15th Conference on Formal Methods in Computer-Aided Design10.5555/2893529.2893540(25-32)Online publication date: 27-Sep-2015
https://dl.acm.org/doi/10.5555/2893529.2893540
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An industrially effective environment for formal hardware verification

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cover image IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems Volume 24, Issue 9

November 2006

170 pages

ISSN:0278-0070

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IEEE Press

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Published: 01 November 2006

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Syme D(2020)The early history of F#Proceedings of the ACM on Programming Languages10.1145/33863254:HOPL(1-58)Online publication date: 12-Jun-2020
https://dl.acm.org/doi/10.1145/3386325
Chakraborty SKhasidashvili ZSeger CGajavelly RHaldankar TChhatani DMistry R(2017)Symbolic trajectory evaluation for word-level verificationFormal Methods in System Design10.1007/s10703-017-0268-950:2-3(317-352)Online publication date: 1-Jun-2017
https://dl.acm.org/doi/10.1007/s10703-017-0268-9
Bingham JKaivola RWahl T(2015)Universal boolean functional vectorsProceedings of the 15th Conference on Formal Methods in Computer-Aided Design10.5555/2893529.2893540(25-32)Online publication date: 27-Sep-2015
https://dl.acm.org/doi/10.5555/2893529.2893540
Sheeran M(2015)Functional programming and hardware design: still interesting after all these yearsACM SIGPLAN Notices10.1145/2858949.278905350:9(165-165)Online publication date: 29-Aug-2015
https://dl.acm.org/doi/10.1145/2858949.2789053
Sheeran MFisher KReppy J(2015)Functional programming and hardware design: still interesting after all these yearsProceedings of the 20th ACM SIGPLAN International Conference on Functional Programming10.1145/2784731.2789053(165-165)Online publication date: 29-Aug-2015
https://dl.acm.org/doi/10.1145/2784731.2789053
Lijun Wu Huijia Huang Kaile Su Shaowei Cai Xiaosong Zhang (2015)An I/O Efficient Model Checking Algorithm for Large-Scale SystemsIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2014.233006123:5(905-915)Online publication date: 1-May-2015
https://dl.acm.org/doi/10.1109/TVLSI.2014.2330061
Bingham JLeslie-Hurd J(2014)Verifying Relative Error Bounds Using Symbolic SimulationProceedings of the 16th International Conference on Computer Aided Verification - Volume 855910.1007/978-3-319-08867-9_18(277-292)Online publication date: 18-Jul-2014
https://dl.acm.org/doi/10.1007/978-3-319-08867-9_18
Gammie P(2013)Synchronous digital circuits as functional programsACM Computing Surveys10.1145/2543581.254358846:2(1-27)Online publication date: 1-Nov-2013
https://dl.acm.org/doi/10.1145/2543581.2543588
Li YHung WSong XZeng N(2011)Exploring structural symmetry automatically in symbolic trajectory evaluationFormal Methods in System Design10.1007/s10703-011-0119-z39:2(117-143)Online publication date: 1-Oct-2011
https://dl.acm.org/doi/10.1007/s10703-011-0119-z
Li YZeng NHung WSong X(2011)Combining theorem proving and symbolic trajectory evaluation in THM&STEProceedings of the 7th international Haifa Verification conference on Hardware and Software: verification and testing10.1007/978-3-642-34188-5_21(242-246)Online publication date: 6-Dec-2011
https://dl.acm.org/doi/10.1007/978-3-642-34188-5_21
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