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- Abdulrahman EReyhani-Masoleh A(2016)High-Speed Hybrid-Double Multiplication Architectures Using New Serial-Out Bit-Level Mastrovito MultipliersIEEE Transactions on Computers10.1109/TC.2015.245602365:6(1734-1747)Online publication date: 6-May-2016
- Fan HHasan M(2015)A survey of some recent bit-parallel GF ( 2 n ) multipliersFinite Fields and Their Applications10.1016/j.ffa.2014.10.00832:C(5-43)Online publication date: 1-Mar-2015
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