research-article

Accurate Machine-Learning-Based On-Chip Router Modeling

Authors:

Kwangok Jeong,

A. B. Kahng,

B. Lin,

K. SamadiAuthors Info & Claims

IEEE Embedded Systems Letters, Volume 2, Issue 3

Pages 62 - 66

https://doi.org/10.1109/LES.2010.2051413

Published: 01 September 2010 Publication History

Abstract

As industry moves towards multicore chips, networks-on-chip (NoCs) are emerging as the scalable fabric for interconnecting the cores. With power now the first-order design constraint, early-stage estimation of NoC power, performance, and area has become crucially important. In this work, we develop accurate architecture-level on-chip router cost models using machine-learning-based regression techniques. Compared against existing models (e.g., ORION 2.0 and parametric models), our models reduce estimation error by up to 89% on average.

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cover image IEEE Embedded Systems Letters

IEEE Embedded Systems Letters Volume 2, Issue 3

September 2010

41 pages

ISSN:1943-0663

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IEEE Press

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Published: 01 September 2010

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Zheng QTian XYu ZJin BJiang NDing YYang MElhanashi ASaponara SKpalma K(2024)Application of complete ensemble empirical mode decomposition based multi-stream informer (CEEMD-MsI) in PM2.5 concentration long-term predictionExpert Systems with Applications: An International Journal10.1016/j.eswa.2023.123008245:COnline publication date: 2-Jul-2024
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Kelley JHagan M(2024)Comparison of neural network NARX and NARMAX models for multi-step prediction using simulated and experimental dataExpert Systems with Applications: An International Journal10.1016/j.eswa.2023.121437237:PAOnline publication date: 27-Feb-2024
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