Article

Application Development on the SRC Computers, Inc. Systems

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Daniel S. PoznanovicAuthors Info & Claims

IPDPS '05: Proceedings of the 19th IEEE International Parallel and Distributed Processing Symposium (IPDPS'05) - Papers - Volume 01

Page 78.1

https://doi.org/10.1109/IPDPS.2005.110

Published: 04 April 2005 Publication History

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Abstract

This paper describes application development for the SRC-6 system. Programs are written in high level programming languages of C and Fortran. The SRC-6 architecture is described, and performance advantage of Direct Execution Logic over microprocessors is explained. Optimizations available to programmers and example codes are discussed: 1) string searching, 2) median filter-edge detector.

References

[1]

J. Hammes, "Methodology for pipelining and fusing stenciled loops", Technical Report SWP-009-00, SRC Computers, Inc., November 2003.

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[2]

Dan Poznanovic, Application Defined Processors, Linux Journal, Jan. 2005, Issue 129, pg. 82-86.

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Curreri JStitt GGeorge A(2011)High-level synthesis of in-circuit assertions for verification, debugging, and timing analysisInternational Journal of Reconfigurable Computing10.1155/2011/4068572011(1-17)Online publication date: 1-Jan-2011
https://dl.acm.org/doi/10.1155/2011/406857
Dohi KShibata YHamada TMasada TOguri KBuell D(2011)Implementation of a programming environment with a multithread model for reconfigurable systemsACM SIGARCH Computer Architecture News10.1145/1926367.192637538:4(40-45)Online publication date: 14-Jan-2011
https://dl.acm.org/doi/10.1145/1926367.1926375
Curreri JKoehler SGeorge AHolland BGarcia R(2010)Performance Analysis Framework for High-Level Language Applications in Reconfigurable ComputingACM Transactions on Reconfigurable Technology and Systems10.1145/1661438.16614433:1(1-23)Online publication date: 1-Jan-2010
https://dl.acm.org/doi/10.1145/1661438.1661443
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Application Development on the SRC Computers, Inc. Systems

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IPDPS '05: Proceedings of the 19th IEEE International Parallel and Distributed Processing Symposium (IPDPS'05) - Papers - Volume 01

April 2005

ISBN:0769523129

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IEEE Computer Society

United States

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Published: 04 April 2005

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Curreri JStitt GGeorge A(2011)High-level synthesis of in-circuit assertions for verification, debugging, and timing analysisInternational Journal of Reconfigurable Computing10.1155/2011/4068572011(1-17)Online publication date: 1-Jan-2011
Dohi KShibata YHamada TMasada TOguri KBuell D(2011)Implementation of a programming environment with a multithread model for reconfigurable systemsACM SIGARCH Computer Architecture News10.1145/1926367.192637538:4(40-45)Online publication date: 14-Jan-2011
Curreri JKoehler SGeorge AHolland BGarcia R(2010)Performance Analysis Framework for High-Level Language Applications in Reconfigurable ComputingACM Transactions on Reconfigurable Technology and Systems10.1145/1661438.16614433:1(1-23)Online publication date: 1-Jan-2010
Underwood KHemmert KUlmer C(2009)From Silicon to ScienceACM Transactions on Reconfigurable Technology and Systems10.1145/1575779.15757862:4(1-15)Online publication date: 1-Sep-2009
Putnam AEggers SBennett DDellinger EMason JStyles HSundararajan PWittig R(2009)Performance and power of cache-based reconfigurable computingACM SIGARCH Computer Architecture News10.1145/1555815.155580437:3(395-405)Online publication date: 20-Jun-2009
Putnam AEggers SBennett DDellinger EMason JStyles HSundararajan PWittig RKeckler SBarroso L(2009)Performance and power of cache-based reconfigurable computingProceedings of the 36th annual international symposium on Computer architecture10.1145/1555754.1555804(395-405)Online publication date: 20-Jun-2009
Putnam ABennett DDellinger EMason JSundararajan PHutton MChow P(2008)CHiMPSProceedings of the 16th international ACM/SIGDA symposium on Field programmable gate arrays10.1145/1344671.1344720(261-261)Online publication date: 24-Feb-2008
Scrofano RZhuo LPrasanna V(2008)Area-efficient arithmetic expression evaluation using deeply pipelined floating-point coresIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2007.91203816:2(167-176)Online publication date: 1-Feb-2008
Hauck SDeHon A(2007)Reconfigurable ComputingundefinedOnline publication date: 2-Nov-2007

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Mapping Hierarchical Multiple File VHDL Kernels onto an SRC-7 High Performance Reconfigurable Computer

Application hardware-software co-design for reconfigurable computing systems

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