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Article

Reducing the Write Traffic for a Hybrid Cache Protocol

Authors:

Fredrik Dahlgren,

Per StenstromAuthors Info & Claims

ICPP '94: Proceedings of the 1994 International Conference on Parallel Processing - Volume 01

Pages 166 - 173

https://doi.org/10.1109/ICPP.1994.175

Published: 15 August 1994 Publication History

Abstract

Coherence misses limit the performance of write-invalidate cache protocols in large-scale shared-memory multi-processors. By contrast, hybrid protocols mix updates with invalidations and can reduce the coherence miss rate. The gains of the fewer coherence misses, however, can sometimes be outweighed by contention due to the extra traffic making techniques to cut the write traffic important. We study in this paper how write traffic for hybrid protocols can be reduced by incorporating a write cache in each node. Detailed architectural simulations reveal that write caches are effective in exploiting locality in write accesses under relaxed memory consistency models. Hybrid protocols augmented with write caches with only a few entries are shown to outperform a write-invalidate protocol for all five benchmark applications under study.

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Brorsson, M., Dahlgren, R, Nilsson, H., and Stenström, P. The CacheMire Test Bench--A Flexible and Effective Approach for Simulation of Multiprocessors, In Proc, of the 26th Ann. Simulation Symposium, 1993.

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Cited By

Chirkov GWentzlaff DGallivan KNikolopoulos DBeivide RGallopoulos E(2023)Seizing the Bandwidth Scaling of On-Package Interconnect in a Post-Moore's Law WorldProceedings of the 37th International Conference on Supercomputing10.1145/3577193.3593702(410-422)Online publication date: 21-Jun-2023
https://dl.acm.org/doi/10.1145/3577193.3593702
Kayi AEl-Ghazawi TEl-Shishiny HRohou E(2010)An adaptive cache coherence protocol for chip multiprocessorsProceedings of the Second International Forum on Next-Generation Multicore/Manycore Technologies10.1145/1882453.1882458(1-10)Online publication date: 19-Jun-2010
https://dl.acm.org/doi/10.1145/1882453.1882458
Dahlgren F(1999)Techniques for Improving Performance of Hybrid Snooping Cache ProtocolsJournal of Parallel and Distributed Computing10.1006/jpdc.1999.155859:3(329-359)Online publication date: 1-Dec-1999
https://dl.acm.org/doi/10.1006/jpdc.1999.1558
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Reducing the Write Traffic for a Hybrid Cache Protocol

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cover image Guide Proceedings

ICPP '94: Proceedings of the 1994 International Conference on Parallel Processing - Volume 01

August 1994

301 pages

ISBN:0849324939

Publisher

IEEE Computer Society

United States

Publication History

Published: 15 August 1994

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Cited By

Chirkov GWentzlaff DGallivan KNikolopoulos DBeivide RGallopoulos E(2023)Seizing the Bandwidth Scaling of On-Package Interconnect in a Post-Moore's Law WorldProceedings of the 37th International Conference on Supercomputing10.1145/3577193.3593702(410-422)Online publication date: 21-Jun-2023
https://dl.acm.org/doi/10.1145/3577193.3593702
Kayi AEl-Ghazawi TEl-Shishiny HRohou E(2010)An adaptive cache coherence protocol for chip multiprocessorsProceedings of the Second International Forum on Next-Generation Multicore/Manycore Technologies10.1145/1882453.1882458(1-10)Online publication date: 19-Jun-2010
https://dl.acm.org/doi/10.1145/1882453.1882458
Dahlgren F(1999)Techniques for Improving Performance of Hybrid Snooping Cache ProtocolsJournal of Parallel and Distributed Computing10.1006/jpdc.1999.155859:3(329-359)Online publication date: 1-Dec-1999
https://dl.acm.org/doi/10.1006/jpdc.1999.1558
Bianchini RKontothanassis LPinto RDe Maria MAbud MAmorim C(1996)Hiding communication latency and coherence overhead in software DSMsACM SIGPLAN Notices10.1145/248209.23718531:9(198-209)Online publication date: 1-Sep-1996
https://dl.acm.org/doi/10.1145/248209.237185
Bianchini RKontothanassis LPinto RDe Maria MAbud MAmorim C(1996)Hiding communication latency and coherence overhead in software DSMsACM SIGOPS Operating Systems Review10.1145/248208.23718530:5(198-209)Online publication date: 1-Sep-1996
https://dl.acm.org/doi/10.1145/248208.237185
Bianchini RKontothanassis LPinto RDe Maria MAbud MAmorim CDally BEggets S(1996)Hiding communication latency and coherence overhead in software DSMsProceedings of the seventh international conference on Architectural support for programming languages and operating systems10.1145/237090.237185(198-209)Online publication date: 1-Oct-1996
https://dl.acm.org/doi/10.1145/237090.237185

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