Article

Trailblazing: A Hierarchical Approach to Percolation Scheduling

Authors:

Alexandru Nicolau,

Steven NovackAuthors Info & Claims

ICPP '93: Proceedings of the 1993 International Conference on Parallel Processing - Volume 02

Pages 120 - 124

https://doi.org/10.1109/ICPP.1993.181

Published: 16 August 1993 Publication History

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Abstract

Percolation Scheduling (PS) is a system for performing parallelizing transformations for the VLIW and super-scalar cumputation models.

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Drozdov ANovikov S(2009)A program auto-parallelizer based on the component technology of optimizing compiler constructionProgramming and Computing Software10.1134/S036176880906003635:6(321-339)Online publication date: 1-Nov-2009
Le Gal BCasseau EHuet S(2008)Dynamic memory access management for high-performance DSP applications using high-level synthesisIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2008.200082116:11(1454-1464)Online publication date: 1-Nov-2008
Mishra PDutt N(2008)Processor Description LanguagesundefinedOnline publication date: 29-May-2008
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Trailblazing: A Hierarchical Approach to Percolation Scheduling
1. Theory of computation
  1. Models of computation
    1. Concurrency
  2. Theory and algorithms for application domains
    1. Machine learning theory
      1. Reinforcement learning

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Published In

ICPP '93: Proceedings of the 1993 International Conference on Parallel Processing - Volume 02

August 1993

294 pages

ISBN:0849389836

Publisher

IEEE Computer Society

United States

Publication History

Published: 16 August 1993

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Drozdov ANovikov S(2009)A program auto-parallelizer based on the component technology of optimizing compiler constructionProgramming and Computing Software10.1134/S036176880906003635:6(321-339)Online publication date: 1-Nov-2009
Le Gal BCasseau EHuet S(2008)Dynamic memory access management for high-performance DSP applications using high-level synthesisIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2008.200082116:11(1454-1464)Online publication date: 1-Nov-2008
Mishra PDutt N(2008)Processor Description LanguagesundefinedOnline publication date: 29-May-2008
Cordone RFerrandi FSantambrogio MPalermo GSciuto DHirose F(2006)Using speculative computation and parallelizing techniques to improve scheduling of control based designsProceedings of the 2006 Asia and South Pacific Design Automation Conference10.1145/1118299.1118502(898-904)Online publication date: 24-Jan-2006
Corre GSenn EJulien NMartin EGarrett DLach JZukowski C(2004)A memory aware behavioral synthesis tool for real-time VLSI circuitsProceedings of the 14th ACM Great Lakes symposium on VLSI10.1145/988952.988972(82-85)Online publication date: 26-Apr-2004
Corre GSenn EBomel PJulien NMartin EOrailoglu AChou PEles PJantsch A(2004)Memory accesses management during high level synthesisProceedings of the 2nd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis10.1145/1016720.1016733(42-47)Online publication date: 8-Sep-2004
Gupta SDutt NGupta RNicolau A(2003)SPARKProceedings of the 16th International Conference on VLSI Design10.5555/832285.835535Online publication date: 4-Jan-2003
Gupta SReshadi MSavoiu NDutt NGupta RNicolau AAboulhamid ENakamura Y(2002)Dynamic common sub-expression elimination during scheduling in high-level synthesisProceedings of the 15th international symposium on System Synthesis10.1145/581199.581256(261-266)Online publication date: 2-Oct-2002
Halambi AShrivastava ABiswas PDutt NNicolau AAboulhamid ENakamura Y(2002)A design space exploration framework for reduced bit-width instruction set architecture (rISA) designProceedings of the 15th international symposium on System Synthesis10.1145/581199.581228(120-125)Online publication date: 2-Oct-2002
Gupta SSavoiu NDutt NGupta RNicolau AKam TKishinevsky MRotem SAckland B(2002)Coordinated transformations for high-level synthesis of high performance microprocessor blocksProceedings of the 39th annual Design Automation Conference10.1145/513918.514140(898-903)Online publication date: 10-Jun-2002
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