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10.1109/FPL.2010.117guideproceedingsArticle/Chapter ViewAbstractPublication PagesConference Proceedingsacm-pubtype
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Short-Circuits on FPGAs Caused by Partial Runtime Reconfiguration

Published: 31 August 2010 Publication History

Abstract

In this paper, we show how short-circuits on FPGAs can be caused by partial runtime reconfiguration. Short-circuit can even occur on FPGAs that do not offer any tristate resources just by using off the shelf vendor tools without any bitstream manipulation. The duration of the here presented short-circuits ranges from short spikes up to persistent short-circuits that remain active during runtime. Short-circuits will result in increased current consumption and can thus harm the system and must therefore be prevented. An algorithm is derived that detects whether configuration data will cause short-circuits. We implemented this algorithm in a bitstream scanner that can also be used in systems at runtime.

Cited By

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  • (2022)The Future of FPGA Acceleration in Datacenters and the CloudACM Transactions on Reconfigurable Technology and Systems10.1145/350671315:3(1-42)Online publication date: 4-Feb-2022
  • (2020)   Analysis of the Usage Models of System Memory Management Unit in Accelerator-attached Translation UnitsProceedings of the International Symposium on Memory Systems10.1145/3422575.3422781(86-96)Online publication date: 28-Sep-2020
  • (2019)Mitigating Electrical-level Attacks towards Secure Multi-Tenant FPGAs in the CloudACM Transactions on Reconfigurable Technology and Systems10.1145/332822212:3(1-26)Online publication date: 13-Aug-2019
  • Show More Cited By

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Information & Contributors

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Published In

cover image Guide Proceedings
FPL '10: Proceedings of the 2010 International Conference on Field Programmable Logic and Applications
August 2010
617 pages
ISBN:9780769541792

Publisher

IEEE Computer Society

United States

Publication History

Published: 31 August 2010

Author Tags

  1. FPGA
  2. Partial Runtime Reconfiguration
  3. Reconfiguration
  4. Short-Circuits

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Cited By

View all
  • (2022)The Future of FPGA Acceleration in Datacenters and the CloudACM Transactions on Reconfigurable Technology and Systems10.1145/350671315:3(1-42)Online publication date: 4-Feb-2022
  • (2020)   Analysis of the Usage Models of System Memory Management Unit in Accelerator-attached Translation UnitsProceedings of the International Symposium on Memory Systems10.1145/3422575.3422781(86-96)Online publication date: 28-Sep-2020
  • (2019)Mitigating Electrical-level Attacks towards Secure Multi-Tenant FPGAs in the CloudACM Transactions on Reconfigurable Technology and Systems10.1145/332822212:3(1-26)Online publication date: 13-Aug-2019
  • (2014)Design Tools for Implementing Self-Aware and Fault-Tolerant Systems on FPGAsACM Transactions on Reconfigurable Technology and Systems10.1145/26175977:2(1-23)Online publication date: 4-Jul-2014
  • (2014)Simulation-based functional verification of dynamically reconfigurable systemsACM Transactions on Embedded Computing Systems10.1145/256004213:4(1-23)Online publication date: 10-Mar-2014
  • (2014)A power side-channel-based digital to analog converterfor Xilinx FPGAsProceedings of the 2014 ACM/SIGDA international symposium on Field-programmable gate arrays10.1145/2554688.2554770(113-116)Online publication date: 26-Feb-2014
  • (2012)A fault injection analysis of Linux operating on an FPGA-embedded platformInternational Journal of Reconfigurable Computing10.1155/2012/8504872012(7-7)Online publication date: 1-Jan-2012

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