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10.1109/FCCM.2015.20guideproceedingsArticle/Chapter ViewAbstractPublication PagesConference Proceedingsacm-pubtype
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Enabling High Throughput and Virtualization for Traffic Classification on FPGA

Published: 02 May 2015 Publication History

Abstract

As an important network management task, Internet traffic classification requires high throughput. Virtualization is a technique sharing the same piece of hardware for multiple users. We present a high-throughput and virtualized architecture for online traffic classification. To explore massive parallelism, we provide a conversion from a decision-tree into a compact rule set table, we employ modular processing elements and map the table to a 2-dimensional pipelined architecture. To support hardware virtualization, we develop a novel dynamic update mechanism, it requires small resource overhead and has little impact on the overall throughput. To evaluate the performance of this architecture, we implement an online traffic classification engine on a state-of-the-art FPGA. Post place-and-route results show that, our classification engine achieves 5-fold throughput compared with existing dynamically up datable online traffic classification engines on FPGA.

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Information & Contributors

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Published In

cover image Guide Proceedings
FCCM '15: Proceedings of the 2015 IEEE 23rd Annual International Symposium on Field-Programmable Custom Computing Machines
May 2015
239 pages
ISBN:9781479999699

Publisher

IEEE Computer Society

United States

Publication History

Published: 02 May 2015

Author Tags

  1. FPGA
  2. throughput
  3. traffic classification
  4. virtualization

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