research-article

Graph Analytics Accelerators for Cognitive Systems

Authors:

Muhammet Mustafa Ozdal,

Ozcan OzturkAuthors Info & Claims

IEEE Micro, Volume 37, Issue 1

Pages 42 - 51

https://doi.org/10.1109/MM.2017.7

Published: 01 January 2017 Publication History

Abstract

Hardware accelerators are known to be performance and power efficient. This article focuses on accelerator design for graph analytics applications, which are commonly used kernels for cognitive systems. The authors propose a templatized architecture that is specifically optimized for vertex-centric graph applications with irregular memory access patterns, asynchronous execution, and asymmetric convergence. The proposed architecture addresses the limitations of existing CPU and GPU systems while providing a customizable template. The authors' experiments show that the generated accelerators can outperform a high-end CPU system with up to 3 times better performance and 65 times better power efficiency.

References

[1]

J.A. Bilmes, “<chapter-title>Graphical Models and Automatic Speech Recognition</chapter-title>,” Mathematical Foundations of Speech and Language Processing, Springer, 2004, pp. 191–245.

Google Scholar

[2]

R. Nambiar and M. Poess, eds., Performance Evaluation and Benchmarking: Traditional to Big Data to Internet of Things: 7th TPC Technology Conference, <conf-sponsor>Springer</conf-sponsor>, 2016, vol. Volume 9508 .

Google Scholar

[3]

M. Ahmad, C.J. Michael, and O. Khan, “A Case for a Situationally Adaptive Many-Core Execution Model for Cognitive Computing Workloads,” in Proc. 2nd Workshop Cognitive Architectures (CogArch 16), 2016; www.engr.uconn.edu/~omer.khan/pubs/sas-cogarch16.pdf.

Google Scholar

[4]

R. Mihalcea and P. Tarau, “TextRank: Bringing Order into Texts,” in Proc. Conf. Empirical Methods in Natural Language Processing (EMNLP), 2004, pp. 404–411.

Google Scholar

Cited By

View all

Kiningham KLevis PRé C(2023)GRIP: A Graph Neural Network Accelerator ArchitectureIEEE Transactions on Computers10.1109/TC.2022.319708372:4(914-925)Online publication date: 1-Apr-2023
https://dl.acm.org/doi/10.1109/TC.2022.3197083
Ozdal MBustany ISwartz W(2019)Improving Programmability and Efficiency of Large-Scale Graph Analytics for FPGA PlatformsProceedings of the 2019 International Symposium on Physical Design10.1145/3299902.3313157(39-39)Online publication date: 4-Apr-2019
https://dl.acm.org/doi/10.1145/3299902.3313157

Recommendations

Petascale computing with accelerators
PPoPP '09: Proceedings of the 14th ACM SIGPLAN symposium on Principles and practice of parallel programming

A trend is developing in high performance computing in which commodity processors are coupled to various types of computational accelerators. Such systems are commonly called hybrid systems. In this paper, we describe our experience developing an ...
Towards achieving performance portability using directives for accelerators
WACCPD '16: Proceedings of the Third International Workshop on Accelerator Programming Using Directives

In this paper we explore the performance portability of directives provided by OpenMP 4 and OpenACC to program various types of node architectures with attached accelerators, both self-hosted multicore and offload multicore/GPU. Our goal is to examine ...
Augmenting Operating Systems with OpenCL Accelerators

Heterogeneous computing leverages more than one kind of processors to boost the performance of user-space applications with the heterogeneous programming languages, e.g., OpenCL. While some works have been done to accelerate the computations required by ...

Comments

Please enable JavaScript to view thecomments powered by Disqus.

Information & Contributors

Information

Published In

IEEE Micro Volume 37, Issue 1

January 2017

73 pages

ISSN:0272-1732

Issue’s Table of Contents

Publisher

IEEE Computer Society Press

Washington, DC, United States

Publication History

Published: 01 January 2017

Qualifiers

Research-article

Contributors

Other Metrics

View Article Metrics

Bibliometrics & Citations

Bibliometrics

Article Metrics

2
Total Citations
View Citations
0
Total Downloads

Downloads (Last 12 months)0
Downloads (Last 6 weeks)0

Reflects downloads up to 05 Jan 2025

Other Metrics

View Author Metrics

Citations

Cited By

View all

Kiningham KLevis PRé C(2023)GRIP: A Graph Neural Network Accelerator ArchitectureIEEE Transactions on Computers10.1109/TC.2022.319708372:4(914-925)Online publication date: 1-Apr-2023
https://dl.acm.org/doi/10.1109/TC.2022.3197083
Ozdal MBustany ISwartz W(2019)Improving Programmability and Efficiency of Large-Scale Graph Analytics for FPGA PlatformsProceedings of the 2019 International Symposium on Physical Design10.1145/3299902.3313157(39-39)Online publication date: 4-Apr-2019
https://dl.acm.org/doi/10.1145/3299902.3313157

Abstract

References

Cited By

Recommendations

Petascale computing with accelerators

Towards achieving performance portability using directives for accelerators

Augmenting Operating Systems with OpenCL Accelerators

Comments

Information

Published In

Publisher

Publication History

Qualifiers

Contributors

Other Metrics

Bibliometrics

Article Metrics

Other Metrics

Citations

Cited By

View options

Figures

Other

Share

Share this Publication link

Share on social media

Affiliations